Commit 239fdf1b authored by Diego Biurrun's avatar Diego Biurrun
Browse files

x86: build: replace mmx2 by mmxext

Refactoring mmx2/mmxext YASM code with cpuflags will force renames.
So switching to a consistent naming scheme beforehand is sensible.
The name "mmxext" is more official and widespread and also the name
of the CPU flag, as reported e.g. by the Linux kernel.
parent 66adb7ce
......@@ -1378,7 +1378,7 @@ PREDEFINED = "__attribute__(x)=" \
"DEF(x)=x ## _TMPL" \
HAVE_AV_CONFIG_H \
HAVE_MMX \
HAVE_MMX2 \
HAVE_MMXEXT \
HAVE_AMD3DNOW \
"DECLARE_ALIGNED(a,t,n)=t n" \
"offsetof(x,y)=0x42"
......
......@@ -243,7 +243,7 @@ Optimization options (experts only):
--disable-amd3dnow disable 3DNow! optimizations
--disable-amd3dnowext disable 3DNow! extended optimizations
--disable-mmx disable MMX optimizations
--disable-mmx2 disable MMX2 optimizations
--disable-mmxext disable MMXEXT optimizations
--disable-sse disable SSE optimizations
--disable-ssse3 disable SSSE3 optimizations
--disable-avx disable AVX optimizations
......@@ -1054,7 +1054,7 @@ ARCH_EXT_LIST='
fma4
mmi
mmx
mmx2
mmxext
neon
ppc4xx
sse
......@@ -1302,7 +1302,7 @@ x86_64_suggest="cmov fast_cmov"
amd3dnow_deps="mmx"
amd3dnowext_deps="amd3dnow"
mmx_deps="x86"
mmx2_deps="mmx"
mmxext_deps="mmx"
sse_deps="mmx"
ssse3_deps="sse"
avx_deps="ssse3"
......@@ -2861,9 +2861,9 @@ EOF
# check whether xmm clobbers are supported
check_asm xmm_clobbers '"":::"%xmm0"'
# check whether binutils is new enough to compile SSSE3/MMX2
# check whether binutils is new enough to compile SSSE3/MMXEXT
enabled ssse3 && check_asm ssse3 '"pabsw %xmm0, %xmm0"'
enabled mmx2 && check_asm mmx2 '"pmaxub %mm0, %mm1"'
enabled mmxext && check_asm mmxext '"pmaxub %mm0, %mm1"'
if ! disabled_any asm mmx yasm; then
if check_cmd $yasmexe --version; then
......@@ -3307,7 +3307,7 @@ echo "runtime cpu detection ${runtime_cpudetect-no}"
if enabled x86; then
echo "${yasmexe} ${yasm-no}"
echo "MMX enabled ${mmx-no}"
echo "MMX2 enabled ${mmx2-no}"
echo "MMXEXT enabled ${mmxext-no}"
echo "3DNow! enabled ${amd3dnow-no}"
echo "3DNow! extended enabled ${amd3dnowext-no}"
echo "SSE enabled ${sse-no}"
......
......@@ -13,6 +13,11 @@ libavutil: 2011-04-18
API changes, most recent first:
2012-08-03 - xxxxxxx - lavu 51.37.1 - cpu.h
lsws 2.1.1 - swscale.h
Rename AV_CPU_FLAG_MMX2 ---> AV_CPU_FLAG_MMXEXT.
Rename SWS_CPU_CAPS_MMX2 ---> SWS_CPU_CAPS_MMXEXT.
2012-07-xx - xxxxxxx - lavf 54.13.0 - avformat.h
Add AVFMT_FLAG_NOBUFFER for low latency use cases.
......
......@@ -87,7 +87,7 @@ static const struct algo fdct_tab[] = {
#if HAVE_MMX && HAVE_INLINE_ASM
{ "MMX", ff_fdct_mmx, NO_PERM, AV_CPU_FLAG_MMX },
{ "MMX2", ff_fdct_mmx2, NO_PERM, AV_CPU_FLAG_MMX2 },
{ "MMXEXT", ff_fdct_mmx2, NO_PERM, AV_CPU_FLAG_MMXEXT },
{ "SSE2", ff_fdct_sse2, NO_PERM, AV_CPU_FLAG_SSE2 },
#endif
......@@ -111,7 +111,7 @@ static const struct algo idct_tab[] = {
#if HAVE_MMX && HAVE_INLINE_ASM
{ "SIMPLE-MMX", ff_simple_idct_mmx, MMX_SIMPLE_PERM, AV_CPU_FLAG_MMX },
{ "XVID-MMX", ff_idct_xvid_mmx, NO_PERM, AV_CPU_FLAG_MMX, 1 },
{ "XVID-MMX2", ff_idct_xvid_mmx2, NO_PERM, AV_CPU_FLAG_MMX2, 1 },
{ "XVID-MMXEXT", ff_idct_xvid_mmx2, NO_PERM, AV_CPU_FLAG_MMXEXT, 1 },
{ "XVID-SSE2", ff_idct_xvid_sse2, SSE2_PERM, AV_CPU_FLAG_SSE2, 1 },
#endif
......
......@@ -116,8 +116,8 @@ int main(int argc, char **argv)
AVCodecContext *ctx;
int c;
DSPContext cctx, mmxctx;
int flags[2] = { AV_CPU_FLAG_MMX, AV_CPU_FLAG_MMX2 };
int flags_size = HAVE_MMX2 ? 2 : 1;
int flags[2] = { AV_CPU_FLAG_MMX, AV_CPU_FLAG_MMXEXT };
int flags_size = HAVE_MMXEXT ? 2 : 1;
if (argc > 1) {
help();
......
......@@ -68,7 +68,7 @@ cglobal ac3_exponent_min_%1, 3,4,2, exp, reuse_blks, expn, offset
%define LOOP_ALIGN
INIT_MMX
AC3_EXPONENT_MIN mmx
%if HAVE_MMX2
%if HAVE_MMXEXT
%define PMINUB PMINUB_MMXEXT
%define LOOP_ALIGN ALIGN 16
AC3_EXPONENT_MIN mmxext
......
......@@ -65,7 +65,7 @@ av_cold void ff_ac3dsp_init_x86(AC3DSPContext *c, int bit_exact)
c->float_to_fixed24 = ff_float_to_fixed24_3dnow;
}
}
if (mm_flags & AV_CPU_FLAG_MMX2 && HAVE_MMX2) {
if (mm_flags & AV_CPU_FLAG_MMXEXT && HAVE_MMXEXT) {
c->ac3_exponent_min = ff_ac3_exponent_min_mmxext;
c->ac3_max_msb_abs_int16 = ff_ac3_max_msb_abs_int16_mmx2;
}
......
......@@ -486,7 +486,7 @@ void ff_cavsdsp_init_mmx(CAVSDSPContext *c, AVCodecContext *avctx)
int mm_flags = av_get_cpu_flags();
#if HAVE_INLINE_ASM
if (mm_flags & AV_CPU_FLAG_MMX2) ff_cavsdsp_init_mmx2 (c, avctx);
if (mm_flags & AV_CPU_FLAG_MMXEXT) ff_cavsdsp_init_mmx2(c, avctx);
if (mm_flags & AV_CPU_FLAG_3DNOW) ff_cavsdsp_init_3dnow(c, avctx);
#endif /* HAVE_INLINE_ASM */
}
......@@ -3028,7 +3028,7 @@ void ff_dsputil_init_mmx(DSPContext *c, AVCodecContext *avctx)
c->idct_add = ff_idct_xvid_sse2_add;
c->idct = ff_idct_xvid_sse2;
c->idct_permutation_type = FF_SSE2_IDCT_PERM;
} else if (mm_flags & AV_CPU_FLAG_MMX2) {
} else if (mm_flags & AV_CPU_FLAG_MMXEXT) {
c->idct_put = ff_idct_xvid_mmx2_put;
c->idct_add = ff_idct_xvid_mmx2_add;
c->idct = ff_idct_xvid_mmx2;
......@@ -3044,7 +3044,7 @@ void ff_dsputil_init_mmx(DSPContext *c, AVCodecContext *avctx)
dsputil_init_mmx(c, avctx, mm_flags);
}
if (mm_flags & AV_CPU_FLAG_MMX2)
if (mm_flags & AV_CPU_FLAG_MMXEXT)
dsputil_init_mmx2(c, avctx, mm_flags);
if (mm_flags & AV_CPU_FLAG_3DNOW && HAVE_AMD3DNOW)
......
......@@ -1111,7 +1111,7 @@ void ff_dsputilenc_init_mmx(DSPContext* c, AVCodecContext *avctx)
(dct_algo==FF_DCT_AUTO || dct_algo==FF_DCT_MMX)) {
if(mm_flags & AV_CPU_FLAG_SSE2){
c->fdct = ff_fdct_sse2;
}else if(mm_flags & AV_CPU_FLAG_MMX2){
} else if (mm_flags & AV_CPU_FLAG_MMXEXT) {
c->fdct = ff_fdct_mmx2;
}else{
c->fdct = ff_fdct_mmx;
......@@ -1144,8 +1144,7 @@ void ff_dsputilenc_init_mmx(DSPContext* c, AVCodecContext *avctx)
c->ssd_int8_vs_int16 = ssd_int8_vs_int16_mmx;
if (mm_flags & AV_CPU_FLAG_MMX2) {
if (mm_flags & AV_CPU_FLAG_MMXEXT) {
c->sum_abs_dctelem= sum_abs_dctelem_mmx2;
c->vsad[4]= vsad_intra16_mmx2;
......@@ -1186,7 +1185,7 @@ void ff_dsputilenc_init_mmx(DSPContext* c, AVCodecContext *avctx)
c->hadamard8_diff[0] = ff_hadamard8_diff16_mmx;
c->hadamard8_diff[1] = ff_hadamard8_diff_mmx;
if (mm_flags & AV_CPU_FLAG_MMX2) {
if (mm_flags & AV_CPU_FLAG_MMXEXT) {
c->hadamard8_diff[0] = ff_hadamard8_diff16_mmx2;
c->hadamard8_diff[1] = ff_hadamard8_diff_mmx2;
}
......
......@@ -198,7 +198,7 @@ void ff_h264_pred_init_x86(H264PredContext *h, int codec_id, const int bit_depth
}
}
if (mm_flags & AV_CPU_FLAG_MMX2) {
if (mm_flags & AV_CPU_FLAG_MMXEXT) {
h->pred16x16[HOR_PRED8x8 ] = ff_pred16x16_horizontal_mmx2;
h->pred16x16[DC_PRED8x8 ] = ff_pred16x16_dc_mmx2;
if (chroma_format_idc == 1)
......@@ -308,7 +308,7 @@ void ff_h264_pred_init_x86(H264PredContext *h, int codec_id, const int bit_depth
}
}
} else if (bit_depth == 10) {
if (mm_flags & AV_CPU_FLAG_MMX2) {
if (mm_flags & AV_CPU_FLAG_MMXEXT) {
h->pred4x4[DC_PRED ] = ff_pred4x4_dc_10_mmxext;
h->pred4x4[HOR_UP_PRED ] = ff_pred4x4_horizontal_up_10_mmxext;
......
......@@ -218,7 +218,7 @@ void ff_h264dsp_init_x86(H264DSPContext *c, const int bit_depth,
#if HAVE_YASM
int mm_flags = av_get_cpu_flags();
if (chroma_format_idc == 1 && mm_flags & AV_CPU_FLAG_MMX2)
if (chroma_format_idc == 1 && mm_flags & AV_CPU_FLAG_MMXEXT)
c->h264_loop_filter_strength = ff_h264_loop_filter_strength_mmx2;
if (bit_depth == 8) {
......@@ -236,7 +236,7 @@ void ff_h264dsp_init_x86(H264DSPContext *c, const int bit_depth,
if (mm_flags & AV_CPU_FLAG_CMOV)
c->h264_luma_dc_dequant_idct = ff_h264_luma_dc_dequant_idct_mmx;
if (mm_flags & AV_CPU_FLAG_MMX2) {
if (mm_flags & AV_CPU_FLAG_MMXEXT) {
c->h264_idct_dc_add = ff_h264_idct_dc_add_8_mmx2;
c->h264_idct8_dc_add = ff_h264_idct8_dc_add_8_mmx2;
c->h264_idct_add16 = ff_h264_idct_add16_8_mmx2;
......@@ -304,7 +304,7 @@ void ff_h264dsp_init_x86(H264DSPContext *c, const int bit_depth,
}
} else if (bit_depth == 10) {
if (mm_flags & AV_CPU_FLAG_MMX) {
if (mm_flags & AV_CPU_FLAG_MMX2) {
if (mm_flags & AV_CPU_FLAG_MMXEXT) {
#if ARCH_X86_32
c->h264_v_loop_filter_chroma = ff_deblock_v_chroma_10_mmx2;
c->h264_v_loop_filter_chroma_intra = ff_deblock_v_chroma_intra_10_mmx2;
......
......@@ -444,7 +444,7 @@ void ff_dsputil_init_pix_mmx(DSPContext* c, AVCodecContext *avctx)
c->sad[0]= sad16_mmx;
c->sad[1]= sad8_mmx;
}
if (mm_flags & AV_CPU_FLAG_MMX2) {
if (mm_flags & AV_CPU_FLAG_MMXEXT) {
c->pix_abs[0][0] = sad16_mmx2;
c->pix_abs[1][0] = sad8_mmx2;
......
......@@ -595,15 +595,15 @@ static void denoise_dct_sse2(MpegEncContext *s, DCTELEM *block){
#define HAVE_SSSE3 0
#undef HAVE_SSE2
#undef HAVE_MMX2
#undef HAVE_MMXEXT
#define HAVE_SSE2 0
#define HAVE_MMX2 0
#define HAVE_MMXEXT 0
#define RENAME(a) a ## _MMX
#define RENAMEl(a) a ## _mmx
#include "mpegvideo_mmx_template.c"
#undef HAVE_MMX2
#define HAVE_MMX2 1
#undef HAVE_MMXEXT
#define HAVE_MMXEXT 1
#undef RENAME
#undef RENAMEl
#define RENAME(a) a ## _MMX2
......@@ -660,7 +660,7 @@ void ff_MPV_common_init_mmx(MpegEncContext *s)
#endif
if(mm_flags & AV_CPU_FLAG_SSE2){
s->dct_quantize= dct_quantize_SSE2;
} else if(mm_flags & AV_CPU_FLAG_MMX2){
} else if (mm_flags & AV_CPU_FLAG_MMXEXT) {
s->dct_quantize= dct_quantize_MMX2;
} else {
s->dct_quantize= dct_quantize_MMX;
......
......@@ -48,7 +48,7 @@
#define MMREG_WIDTH "8"
#define MM "%%mm"
#define MOVQ "movq"
#if HAVE_MMX2
#if HAVE_MMXEXT
#define SPREADW(a) "pshufw $0, "a", "a" \n\t"
#define PMAXW(a,b) "pmaxsw "a", "b" \n\t"
#define PMAX(a,b) \
......
......@@ -41,7 +41,7 @@ void ff_pngdsp_init_x86(PNGDSPContext *dsp)
if (flags & AV_CPU_FLAG_MMX)
dsp->add_bytes_l2 = ff_add_bytes_l2_mmx;
#endif
if (flags & AV_CPU_FLAG_MMX2)
if (flags & AV_CPU_FLAG_MMXEXT)
dsp->add_paeth_prediction = ff_add_png_paeth_prediction_mmx2;
if (flags & AV_CPU_FLAG_SSE2)
dsp->add_bytes_l2 = ff_add_bytes_l2_sse2;
......
......@@ -37,7 +37,7 @@ av_cold void ff_rv34dsp_init_x86(RV34DSPContext* c, DSPContext *dsp)
if (mm_flags & AV_CPU_FLAG_MMX)
c->rv34_idct_dc_add = ff_rv34_idct_dc_add_mmx;
if (mm_flags & AV_CPU_FLAG_MMX2) {
if (mm_flags & AV_CPU_FLAG_MMXEXT) {
c->rv34_inv_transform_dc = ff_rv34_idct_dc_noround_mmx2;
c->rv34_idct_add = ff_rv34_idct_add_mmx2;
}
......
......@@ -200,7 +200,7 @@ void ff_rv40dsp_init_x86(RV34DSPContext *c, DSPContext *dsp)
QPEL_MC_SET(put_, _mmx)
#endif
}
if (mm_flags & AV_CPU_FLAG_MMX2) {
if (mm_flags & AV_CPU_FLAG_MMXEXT) {
c->avg_chroma_pixels_tab[0] = ff_avg_rv40_chroma_mc8_mmx2;
c->avg_chroma_pixels_tab[1] = ff_avg_rv40_chroma_mc4_mmx2;
c->rv40_weight_pixels_tab[0][0] = ff_rv40_weight_func_rnd_16_mmx2;
......
......@@ -889,7 +889,7 @@ void ff_dwt_init_x86(DWTContext *c)
c->inner_add_yblock = ff_snow_inner_add_yblock_sse2;
}
else{
if(mm_flags & AV_CPU_FLAG_MMX2){
if (mm_flags & AV_CPU_FLAG_MMXEXT) {
c->horizontal_compose97i = ff_snow_horizontal_compose97i_mmx;
#if HAVE_7REGS
c->vertical_compose97i = ff_snow_vertical_compose97i_mmx;
......
......@@ -757,7 +757,7 @@ void ff_vc1dsp_init_mmx(VC1DSPContext *dsp)
dsp->put_vc1_mspel_pixels_tab[15] = put_vc1_mspel_mc33_mmx;
}
if (mm_flags & AV_CPU_FLAG_MMX2){
if (mm_flags & AV_CPU_FLAG_MMXEXT) {
dsp->avg_vc1_mspel_pixels_tab[ 0] = ff_avg_vc1_mspel_mc00_mmx2;
dsp->avg_vc1_mspel_pixels_tab[ 4] = avg_vc1_mspel_mc01_mmx2;
dsp->avg_vc1_mspel_pixels_tab[ 8] = avg_vc1_mspel_mc02_mmx2;
......@@ -798,7 +798,7 @@ void ff_vc1dsp_init_mmx(VC1DSPContext *dsp)
dsp->put_no_rnd_vc1_chroma_pixels_tab[0]= ff_put_vc1_chroma_mc8_mmx_nornd;
}
if (mm_flags & AV_CPU_FLAG_MMX2) {
if (mm_flags & AV_CPU_FLAG_MMXEXT) {
ASSIGN_LF(mmx2);
dsp->avg_no_rnd_vc1_chroma_pixels_tab[0]= ff_avg_vc1_chroma_mc8_mmx2_nornd;
} else if (mm_flags & AV_CPU_FLAG_3DNOW) {
......
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