Commit 245c7831 authored by Mans Rullgard's avatar Mans Rullgard

ac3enc: NEON optimised shift functions

parent f4855a90
......@@ -25,11 +25,15 @@
void ff_ac3_exponent_min_neon(uint8_t *exp, int num_reuse_blocks, int nb_coefs);
int ff_ac3_max_msb_abs_int16_neon(const int16_t *src, int len);
void ff_ac3_lshift_int16_neon(int16_t *src, unsigned len, unsigned shift);
void ff_ac3_rshift_int32_neon(int32_t *src, unsigned len, unsigned shift);
av_cold void ff_ac3dsp_init_arm(AC3DSPContext *c, int bit_exact)
{
if (HAVE_NEON) {
c->ac3_exponent_min = ff_ac3_exponent_min_neon;
c->ac3_max_msb_abs_int16 = ff_ac3_max_msb_abs_int16_neon;
c->ac3_lshift_int16 = ff_ac3_lshift_int16_neon;
c->ac3_rshift_int32 = ff_ac3_rshift_int32_neon;
}
}
......@@ -57,3 +57,24 @@ function ff_ac3_exponent_min_neon, export=1
bgt 1b
pop {pc}
endfunc
function ff_ac3_lshift_int16_neon, export=1
vdup.16 q0, r2
1: vld1.16 {q1}, [r0,:128]
vshl.s16 q1, q1, q0
vst1.16 {q1}, [r0,:128]!
subs r1, r1, #8
bgt 1b
bx lr
endfunc
function ff_ac3_rshift_int32_neon, export=1
rsb r2, r2, #0
vdup.32 q0, r2
1: vld1.32 {q1}, [r0,:128]
vshl.s32 q1, q1, q0
vst1.32 {q1}, [r0,:128]!
subs r1, r1, #4
bgt 1b
bx lr
endfunc
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