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BC
public
external
ffmpeg
Commits
c88c253d
Commit
c88c253d
authored
Apr 17, 2008
by
Diego Biurrun
Browse files
cosmetics: __asm__ __volatile__ --> asm volatile
Originally committed as revision 12885 to
svn://svn.ffmpeg.org/ffmpeg/trunk
parent
c6d4cef7
Changes
11
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11 changed files
with
106 additions
and
106 deletions
+106
-106
libavcodec/armv4l/dsputil_iwmmxt.c
libavcodec/armv4l/dsputil_iwmmxt.c
+3
-3
libavcodec/armv4l/dsputil_iwmmxt_rnd.h
libavcodec/armv4l/dsputil_iwmmxt_rnd.h
+15
-15
libavcodec/armv4l/mpegvideo_armv5te.c
libavcodec/armv4l/mpegvideo_armv5te.c
+1
-1
libavcodec/armv4l/mpegvideo_iwmmxt.c
libavcodec/armv4l/mpegvideo_iwmmxt.c
+1
-1
libavcodec/i386/cputest.c
libavcodec/i386/cputest.c
+1
-1
libavcodec/i386/mmx.h
libavcodec/i386/mmx.h
+10
-10
libavcodec/ps2/idct_mmi.c
libavcodec/ps2/idct_mmi.c
+8
-8
libavcodec/ps2/mmi.h
libavcodec/ps2/mmi.h
+35
-35
libavcodec/sh4/idct_sh4.c
libavcodec/sh4/idct_sh4.c
+6
-6
libavcodec/sparc/vis.h
libavcodec/sparc/vis.h
+25
-25
libavutil/common.h
libavutil/common.h
+1
-1
No files found.
libavcodec/armv4l/dsputil_iwmmxt.c
View file @
c88c253d
...
...
@@ -22,7 +22,7 @@
#include "dsputil.h"
#define DEF(x, y) x ## _no_rnd_ ## y ##_iwmmxt
#define SET_RND(regd)
__
asm
__ __
volatile
__
("mov r12, #1 \n\t tbcsth " #regd ", r12":::"r12");
#define SET_RND(regd) asm
volatile ("mov r12, #1 \n\t tbcsth " #regd ", r12":::"r12");
#define WAVG2B "wavg2b"
#include "dsputil_iwmmxt_rnd.h"
#undef DEF
...
...
@@ -30,7 +30,7 @@
#undef WAVG2B
#define DEF(x, y) x ## _ ## y ##_iwmmxt
#define SET_RND(regd)
__
asm
__ __
volatile
__
("mov r12, #2 \n\t tbcsth " #regd ", r12":::"r12");
#define SET_RND(regd) asm
volatile ("mov r12, #2 \n\t tbcsth " #regd ", r12":::"r12");
#define WAVG2B "wavg2br"
#include "dsputil_iwmmxt_rnd.h"
#undef DEF
...
...
@@ -89,7 +89,7 @@ void add_pixels_clamped_iwmmxt(const DCTELEM *block, uint8_t *pixels, int line_s
{
uint8_t
*
pixels2
=
pixels
+
line_size
;
__
asm
__
__
volatile
__
(
asm
volatile
(
"mov r12, #4
\n\t
"
"1:
\n\t
"
"pld [%[pixels], %[line_size2]]
\n\t
"
...
...
libavcodec/armv4l/dsputil_iwmmxt_rnd.h
View file @
c88c253d
...
...
@@ -26,7 +26,7 @@
void
DEF
(
put
,
pixels8
)(
uint8_t
*
block
,
const
uint8_t
*
pixels
,
const
int
line_size
,
int
h
)
{
int
stride
=
line_size
;
__
asm
__
__
volatile
__
(
asm
volatile
(
"and r12, %[pixels], #7
\n\t
"
"bic %[pixels], %[pixels], #7
\n\t
"
"tmcr wcgr1, r12
\n\t
"
...
...
@@ -60,7 +60,7 @@ void DEF(put, pixels8)(uint8_t *block, const uint8_t *pixels, const int line_siz
void
DEF
(
avg
,
pixels8
)(
uint8_t
*
block
,
const
uint8_t
*
pixels
,
const
int
line_size
,
int
h
)
{
int
stride
=
line_size
;
__
asm
__
__
volatile
__
(
asm
volatile
(
"and r12, %[pixels], #7
\n\t
"
"bic %[pixels], %[pixels], #7
\n\t
"
"tmcr wcgr1, r12
\n\t
"
...
...
@@ -102,7 +102,7 @@ void DEF(avg, pixels8)(uint8_t *block, const uint8_t *pixels, const int line_siz
void
DEF
(
put
,
pixels16
)(
uint8_t
*
block
,
const
uint8_t
*
pixels
,
const
int
line_size
,
int
h
)
{
int
stride
=
line_size
;
__
asm
__
__
volatile
__
(
asm
volatile
(
"and r12, %[pixels], #7
\n\t
"
"bic %[pixels], %[pixels], #7
\n\t
"
"tmcr wcgr1, r12
\n\t
"
...
...
@@ -142,7 +142,7 @@ void DEF(put, pixels16)(uint8_t *block, const uint8_t *pixels, const int line_si
void
DEF
(
avg
,
pixels16
)(
uint8_t
*
block
,
const
uint8_t
*
pixels
,
const
int
line_size
,
int
h
)
{
int
stride
=
line_size
;
__
asm
__
__
volatile
__
(
asm
volatile
(
"pld [%[pixels]]
\n\t
"
"pld [%[pixels], #32]
\n\t
"
"pld [%[block]]
\n\t
"
...
...
@@ -201,7 +201,7 @@ void DEF(put, pixels8_x2)(uint8_t *block, const uint8_t *pixels, const int line_
// [wr0 wr1 wr2 wr3] for previous line
// [wr4 wr5 wr6 wr7] for current line
SET_RND
(
wr15
);
// =2 for rnd and =1 for no_rnd version
__
asm
__
__
volatile
__
(
asm
volatile
(
"pld [%[pixels]]
\n\t
"
"pld [%[pixels], #32]
\n\t
"
"and r12, %[pixels], #7
\n\t
"
...
...
@@ -250,7 +250,7 @@ void DEF(put, pixels16_x2)(uint8_t *block, const uint8_t *pixels, const int line
// [wr0 wr1 wr2 wr3] for previous line
// [wr4 wr5 wr6 wr7] for current line
SET_RND
(
wr15
);
// =2 for rnd and =1 for no_rnd version
__
asm
__
__
volatile
__
(
asm
volatile
(
"pld [%[pixels]]
\n\t
"
"pld [%[pixels], #32]
\n\t
"
"and r12, %[pixels], #7
\n\t
"
...
...
@@ -311,7 +311,7 @@ void DEF(avg, pixels8_x2)(uint8_t *block, const uint8_t *pixels, const int line_
// [wr0 wr1 wr2 wr3] for previous line
// [wr4 wr5 wr6 wr7] for current line
SET_RND
(
wr15
);
// =2 for rnd and =1 for no_rnd version
__
asm
__
__
volatile
__
(
asm
volatile
(
"pld [%[pixels]]
\n\t
"
"pld [%[pixels], #32]
\n\t
"
"pld [%[block]]
\n\t
"
...
...
@@ -372,7 +372,7 @@ void DEF(avg, pixels16_x2)(uint8_t *block, const uint8_t *pixels, const int line
// [wr0 wr1 wr2 wr3] for previous line
// [wr4 wr5 wr6 wr7] for current line
SET_RND
(
wr15
);
// =2 for rnd and =1 for no_rnd version
__
asm
__
__
volatile
__
(
asm
volatile
(
"pld [%[pixels]]
\n\t
"
"pld [%[pixels], #32]
\n\t
"
"pld [%[block]]
\n\t
"
...
...
@@ -448,7 +448,7 @@ void DEF(avg, pixels8_y2)(uint8_t *block, const uint8_t *pixels, const int line_
int
stride
=
line_size
;
// [wr0 wr1 wr2 wr3] for previous line
// [wr4 wr5 wr6 wr7] for current line
__
asm
__
__
volatile
__
(
asm
volatile
(
"pld [%[pixels]]
\n\t
"
"pld [%[pixels], #32]
\n\t
"
"and r12, %[pixels], #7
\n\t
"
...
...
@@ -502,7 +502,7 @@ void DEF(put, pixels16_y2)(uint8_t *block, const uint8_t *pixels, const int line
int
stride
=
line_size
;
// [wr0 wr1 wr2 wr3] for previous line
// [wr4 wr5 wr6 wr7] for current line
__
asm
__
__
volatile
__
(
asm
volatile
(
"pld [%[pixels]]
\n\t
"
"pld [%[pixels], #32]
\n\t
"
"and r12, %[pixels], #7
\n\t
"
...
...
@@ -559,7 +559,7 @@ void DEF(avg, pixels16_y2)(uint8_t *block, const uint8_t *pixels, const int line
int
stride
=
line_size
;
// [wr0 wr1 wr2 wr3] for previous line
// [wr4 wr5 wr6 wr7] for current line
__
asm
__
__
volatile
__
(
asm
volatile
(
"pld [%[pixels]]
\n\t
"
"pld [%[pixels], #32]
\n\t
"
"and r12, %[pixels], #7
\n\t
"
...
...
@@ -627,7 +627,7 @@ void DEF(put, pixels8_xy2)(uint8_t *block, const uint8_t *pixels, const int line
// [wr0 wr1 wr2 wr3] for previous line
// [wr4 wr5 wr6 wr7] for current line
SET_RND
(
wr15
);
// =2 for rnd and =1 for no_rnd version
__
asm
__
__
volatile
__
(
asm
volatile
(
"pld [%[pixels]]
\n\t
"
"mov r12, #2
\n\t
"
"pld [%[pixels], #32]
\n\t
"
...
...
@@ -721,7 +721,7 @@ void DEF(put, pixels16_xy2)(uint8_t *block, const uint8_t *pixels, const int lin
// [wr0 wr1 wr2 wr3] for previous line
// [wr4 wr5 wr6 wr7] for current line
SET_RND
(
wr15
);
// =2 for rnd and =1 for no_rnd version
__
asm
__
__
volatile
__
(
asm
volatile
(
"pld [%[pixels]]
\n\t
"
"mov r12, #2
\n\t
"
"pld [%[pixels], #32]
\n\t
"
...
...
@@ -863,7 +863,7 @@ void DEF(avg, pixels8_xy2)(uint8_t *block, const uint8_t *pixels, const int line
// [wr0 wr1 wr2 wr3] for previous line
// [wr4 wr5 wr6 wr7] for current line
SET_RND
(
wr15
);
// =2 for rnd and =1 for no_rnd version
__
asm
__
__
volatile
__
(
asm
volatile
(
"pld [%[block]]
\n\t
"
"pld [%[block], #32]
\n\t
"
"pld [%[pixels]]
\n\t
"
...
...
@@ -967,7 +967,7 @@ void DEF(avg, pixels16_xy2)(uint8_t *block, const uint8_t *pixels, const int lin
// [wr0 wr1 wr2 wr3] for previous line
// [wr4 wr5 wr6 wr7] for current line
SET_RND
(
wr15
);
// =2 for rnd and =1 for no_rnd version
__
asm
__
__
volatile
__
(
asm
volatile
(
"pld [%[block]]
\n\t
"
"pld [%[block], #32]
\n\t
"
"pld [%[pixels]]
\n\t
"
...
...
libavcodec/armv4l/mpegvideo_armv5te.c
View file @
c88c253d
...
...
@@ -65,7 +65,7 @@ static inline void dct_unquantize_h263_helper_c(DCTELEM *block, int qmul, int qa
({ DCTELEM *xblock = xxblock; \
int xqmul = xxqmul, xqadd = xxqadd, xcount = xxcount, xtmp; \
int xdata1, xdata2; \
__
asm
__ __
volatile
__
( \
asm
volatile( \
"subs %[count], %[count], #2 \n\t" \
"ble 2f \n\t" \
"ldrd r4, [%[block], #0] \n\t" \
...
...
libavcodec/armv4l/mpegvideo_iwmmxt.c
View file @
c88c253d
...
...
@@ -48,7 +48,7 @@ static void dct_unquantize_h263_intra_iwmmxt(MpegEncContext *s,
else
nCoeffs
=
s
->
inter_scantable
.
raster_end
[
s
->
block_last_index
[
n
]
];
__
asm
__
__
volatile
__
(
asm
volatile
(
/* "movd %1, %%mm6 \n\t" //qmul */
/* "packssdw %%mm6, %%mm6 \n\t" */
/* "packssdw %%mm6, %%mm6 \n\t" */
...
...
libavcodec/i386/cputest.c
View file @
c88c253d
...
...
@@ -44,7 +44,7 @@ int mm_support(void)
int
max_std_level
,
max_ext_level
,
std_caps
=
0
,
ext_caps
=
0
;
long
a
,
c
;
__
asm
__
__
volatile
__
(
asm
volatile
(
/* See if CPUID instruction is supported ... */
/* ... Get copies of EFLAGS into eax and ecx */
"pushf
\n\t
"
...
...
libavcodec/i386/mmx.h
View file @
c88c253d
...
...
@@ -43,25 +43,25 @@ typedef union {
#define mmx_i2r(op,imm,reg) \
__
asm
__ __
volatile
__
(#op " %0, %%" #reg \
asm
volatile (#op " %0, %%" #reg \
:
/* nothing */
\
: "i" (imm) )
#define mmx_m2r(op,mem,reg) \
__
asm
__ __
volatile
__
(#op " %0, %%" #reg \
asm
volatile (#op " %0, %%" #reg \
:
/* nothing */
\
: "m" (mem))
#define mmx_r2m(op,reg,mem) \
__
asm
__ __
volatile
__
(#op " %%" #reg ", %0" \
asm
volatile (#op " %%" #reg ", %0" \
: "=m" (mem) \
:
/* nothing */
)
#define mmx_r2r(op,regs,regd) \
__
asm
__ __
volatile
__
(#op " %" #regs ", %" #regd)
asm
volatile (#op " %" #regs ", %" #regd)
#define emms()
__
asm
__ __
volatile
__
("emms")
#define emms() asm
volatile ("emms")
#define movd_m2r(var,reg) mmx_m2r (movd, var, reg)
#define movd_r2m(reg,var) mmx_r2m (movd, reg, var)
...
...
@@ -200,16 +200,16 @@ typedef union {
#define mmx_m2ri(op,mem,reg,imm) \
__
asm
__ __
volatile
__
(#op " %1, %0, %%" #reg \
asm
volatile (#op " %1, %0, %%" #reg \
:
/* nothing */
\
: "m" (mem), "i" (imm))
#define mmx_r2ri(op,regs,regd,imm) \
__
asm
__ __
volatile
__
(#op " %0, %%" #regs ", %%" #regd \
asm
volatile (#op " %0, %%" #regs ", %%" #regd \
:
/* nothing */
\
: "i" (imm) )
#define mmx_fetch(mem,hint) \
__
asm
__ __
volatile
__
("prefetch" #hint " %0" \
asm
volatile ("prefetch" #hint " %0" \
:
/* nothing */
\
: "m" (mem))
...
...
@@ -240,7 +240,7 @@ typedef union {
#define pminub_r2r(regs,regd) mmx_r2r (pminub, regs, regd)
#define pmovmskb(mmreg,reg) \
__
asm
__ __
volatile
__
("movmskps %" #mmreg ", %" #reg)
asm
volatile ("movmskps %" #mmreg ", %" #reg)
#define pmulhuw_m2r(var,reg) mmx_m2r (pmulhuw, var, reg)
#define pmulhuw_r2r(regs,regd) mmx_r2r (pmulhuw, regs, regd)
...
...
@@ -256,7 +256,7 @@ typedef union {
#define pshufw_m2r(var,reg,imm) mmx_m2ri(pshufw, var, reg, imm)
#define pshufw_r2r(regs,regd,imm) mmx_r2ri(pshufw, regs, regd, imm)
#define sfence()
__
asm
__ __
volatile
__
("sfence\n\t")
#define sfence() asm
volatile ("sfence\n\t")
/* SSE2 */
#define pshufhw_m2r(var,reg,imm) mmx_m2ri(pshufhw, var, reg, imm)
...
...
libavcodec/ps2/idct_mmi.c
View file @
c88c253d
...
...
@@ -257,7 +257,7 @@ static short consttable[] align16 = {
pmaxh($2, $0, $2); \
ppacb($0, $2, $2); \
sd3(2, 0, 4); \
__
asm
__ __
volatile
__
("add $4, $5, $4");
asm
volatile ("add $4, $5, $4");
#define DCT_8_INV_COL8_PUT() \
PUT($16); \
...
...
@@ -277,7 +277,7 @@ static short consttable[] align16 = {
pmaxh($2, $0, $2); \
ppacb($0, $2, $2); \
sd3(2, 0, 4); \
__
asm
__ __
volatile
__
("add $4, $5, $4");
asm
volatile ("add $4, $5, $4");
/*fixme: schedule*/
#define DCT_8_INV_COL8_ADD() \
...
...
@@ -294,7 +294,7 @@ static short consttable[] align16 = {
void
ff_mmi_idct
(
int16_t
*
block
)
{
/* $4 = block */
__
asm
__
__
volatile
__
(
"la $24, %0"
::
"m"
(
consttable
[
0
]));
asm
volatile
(
"la $24, %0"
::
"m"
(
consttable
[
0
]));
lq
(
$
24
,
ROUNDER_0
,
$
8
);
lq
(
$
24
,
ROUNDER_1
,
$
7
);
DCT_8_INV_ROW1
(
$
4
,
0
,
TAB_i_04
,
$
8
,
$
8
);
...
...
@@ -309,14 +309,14 @@ void ff_mmi_idct(int16_t * block)
DCT_8_INV_COL8_STORE
(
$
4
);
//let savedtemp regs be saved
__
asm
__
__
volatile
__
(
" "
:::
"$16"
,
"$17"
,
"$18"
,
"$19"
,
"$20"
,
"$21"
,
"$22"
,
"$23"
);
asm
volatile
(
" "
:::
"$16"
,
"$17"
,
"$18"
,
"$19"
,
"$20"
,
"$21"
,
"$22"
,
"$23"
);
}
void
ff_mmi_idct_put
(
uint8_t
*
dest
,
int
line_size
,
DCTELEM
*
block
)
{
/* $4 = dest, $5 = line_size, $6 = block */
__
asm
__
__
volatile
__
(
"la $24, %0"
::
"m"
(
consttable
[
0
]));
asm
volatile
(
"la $24, %0"
::
"m"
(
consttable
[
0
]));
lq
(
$
24
,
ROUNDER_0
,
$
8
);
lq
(
$
24
,
ROUNDER_1
,
$
7
);
DCT_8_INV_ROW1
(
$
6
,
0
,
TAB_i_04
,
$
8
,
$
8
);
...
...
@@ -333,14 +333,14 @@ void ff_mmi_idct_put(uint8_t *dest, int line_size, DCTELEM *block)
DCT_8_INV_COL8_PUT
();
//let savedtemp regs be saved
__
asm
__
__
volatile
__
(
" "
:::
"$16"
,
"$17"
,
"$18"
,
"$19"
,
"$20"
,
"$21"
,
"$22"
,
"$23"
);
asm
volatile
(
" "
:::
"$16"
,
"$17"
,
"$18"
,
"$19"
,
"$20"
,
"$21"
,
"$22"
,
"$23"
);
}
void
ff_mmi_idct_add
(
uint8_t
*
dest
,
int
line_size
,
DCTELEM
*
block
)
{
/* $4 = dest, $5 = line_size, $6 = block */
__
asm
__
__
volatile
__
(
"la $24, %0"
::
"m"
(
consttable
[
0
]));
asm
volatile
(
"la $24, %0"
::
"m"
(
consttable
[
0
]));
lq
(
$
24
,
ROUNDER_0
,
$
8
);
lq
(
$
24
,
ROUNDER_1
,
$
7
);
DCT_8_INV_ROW1
(
$
6
,
0
,
TAB_i_04
,
$
8
,
$
8
);
...
...
@@ -357,6 +357,6 @@ void ff_mmi_idct_add(uint8_t *dest, int line_size, DCTELEM *block)
DCT_8_INV_COL8_ADD
();
//let savedtemp regs be saved
__
asm
__
__
volatile
__
(
" "
:::
"$16"
,
"$17"
,
"$18"
,
"$19"
,
"$20"
,
"$21"
,
"$22"
,
"$23"
);
asm
volatile
(
" "
:::
"$16"
,
"$17"
,
"$18"
,
"$19"
,
"$20"
,
"$21"
,
"$22"
,
"$23"
);
}
libavcodec/ps2/mmi.h
View file @
c88c253d
...
...
@@ -60,112 +60,112 @@
#define lq(base, off, reg) \
__
asm
__ __
volatile
__
("lq " #reg ", %0("#base ")" : : "i" (off) )
asm
volatile ("lq " #reg ", %0("#base ")" : : "i" (off) )
#define lq2(mem, reg) \
__
asm
__ __
volatile
__
("lq " #reg ", %0" : : "r" (mem))
asm
volatile ("lq " #reg ", %0" : : "r" (mem))
#define sq(reg, off, base) \
__
asm
__ __
volatile
__
("sq " #reg ", %0("#base ")" : : "i" (off) )
asm
volatile ("sq " #reg ", %0("#base ")" : : "i" (off) )
/*
#define ld(base, off, reg) \
__
asm
__ __
volatile
__
("ld " #reg ", " #off "("#base ")")
asm
volatile ("ld " #reg ", " #off "("#base ")")
*/
#define ld3(base, off, reg) \
__
asm
__ __
volatile
__
(".word %0" : : "i" ( 0xdc000000 | (base<<21) | (reg<<16) | (off)))
asm
volatile (".word %0" : : "i" ( 0xdc000000 | (base<<21) | (reg<<16) | (off)))
#define ldr3(base, off, reg) \
__
asm
__ __
volatile
__
(".word %0" : : "i" ( 0x6c000000 | (base<<21) | (reg<<16) | (off)))
asm
volatile (".word %0" : : "i" ( 0x6c000000 | (base<<21) | (reg<<16) | (off)))
#define ldl3(base, off, reg) \
__
asm
__ __
volatile
__
(".word %0" : : "i" ( 0x68000000 | (base<<21) | (reg<<16) | (off)))
asm
volatile (".word %0" : : "i" ( 0x68000000 | (base<<21) | (reg<<16) | (off)))
/*
#define sd(reg, off, base) \
__
asm
__ __
volatile
__
("sd " #reg ", " #off "("#base ")")
asm
volatile ("sd " #reg ", " #off "("#base ")")
*/
//seems assembler has bug encoding mnemonic 'sd', so DIY
#define sd3(reg, off, base) \
__
asm
__ __
volatile
__
(".word %0" : : "i" ( 0xfc000000 | (base<<21) | (reg<<16) | (off)))
asm
volatile (".word %0" : : "i" ( 0xfc000000 | (base<<21) | (reg<<16) | (off)))
#define sw(reg, off, base) \
__
asm
__ __
volatile
__
("sw " #reg ", " #off "("#base ")")
asm
volatile ("sw " #reg ", " #off "("#base ")")
#define sq2(reg, mem) \
__
asm
__ __
volatile
__
("sq " #reg ", %0" : : "m" (*(mem)))
asm
volatile ("sq " #reg ", %0" : : "m" (*(mem)))
#define pinth(rs, rt, rd) \
__
asm
__ __
volatile
__
("pinth " #rd ", " #rs ", " #rt )
asm
volatile ("pinth " #rd ", " #rs ", " #rt )
#define phmadh(rs, rt, rd) \
__
asm
__ __
volatile
__
("phmadh " #rd ", " #rs ", " #rt )
asm
volatile ("phmadh " #rd ", " #rs ", " #rt )
#define pcpyud(rs, rt, rd) \
__
asm
__ __
volatile
__
("pcpyud " #rd ", " #rs ", " #rt )
asm
volatile ("pcpyud " #rd ", " #rs ", " #rt )
#define pcpyld(rs, rt, rd) \
__
asm
__ __
volatile
__
("pcpyld " #rd ", " #rs ", " #rt )
asm
volatile ("pcpyld " #rd ", " #rs ", " #rt )
#define pcpyh(rt, rd) \
__
asm
__ __
volatile
__
("pcpyh " #rd ", " #rt )
asm
volatile ("pcpyh " #rd ", " #rt )
#define paddw(rs, rt, rd) \
__
asm
__ __
volatile
__
("paddw " #rd ", " #rs ", " #rt )
asm
volatile ("paddw " #rd ", " #rs ", " #rt )
#define pextlw(rs, rt, rd) \
__
asm
__ __
volatile
__
("pextlw " #rd ", " #rs ", " #rt )
asm
volatile ("pextlw " #rd ", " #rs ", " #rt )
#define pextuw(rs, rt, rd) \
__
asm
__ __
volatile
__
("pextuw " #rd ", " #rs ", " #rt )
asm
volatile ("pextuw " #rd ", " #rs ", " #rt )
#define pextlh(rs, rt, rd) \
__
asm
__ __
volatile
__
("pextlh " #rd ", " #rs ", " #rt )
asm
volatile ("pextlh " #rd ", " #rs ", " #rt )
#define pextuh(rs, rt, rd) \
__
asm
__ __
volatile
__
("pextuh " #rd ", " #rs ", " #rt )
asm
volatile ("pextuh " #rd ", " #rs ", " #rt )
#define psubw(rs, rt, rd) \
__
asm
__ __
volatile
__
("psubw " #rd ", " #rs ", " #rt )
asm
volatile ("psubw " #rd ", " #rs ", " #rt )
#define psraw(rt, sa, rd) \
__
asm
__ __
volatile
__
("psraw " #rd ", " #rt ", %0" : : "i"(sa) )
asm
volatile ("psraw " #rd ", " #rt ", %0" : : "i"(sa) )
#define ppach(rs, rt, rd) \
__
asm
__ __
volatile
__
("ppach " #rd ", " #rs ", " #rt )
asm
volatile ("ppach " #rd ", " #rs ", " #rt )
#define ppacb(rs, rt, rd) \
__
asm
__ __
volatile
__
("ppacb " #rd ", " #rs ", " #rt )
asm
volatile ("ppacb " #rd ", " #rs ", " #rt )
#define prevh(rt, rd) \
__
asm
__ __
volatile
__
("prevh " #rd ", " #rt )
asm
volatile ("prevh " #rd ", " #rt )
#define pmulth(rs, rt, rd) \
__
asm
__ __
volatile
__
("pmulth " #rd ", " #rs ", " #rt )
asm
volatile ("pmulth " #rd ", " #rs ", " #rt )
#define pmaxh(rs, rt, rd) \
__
asm
__ __
volatile
__
("pmaxh " #rd ", " #rs ", " #rt )
asm
volatile ("pmaxh " #rd ", " #rs ", " #rt )
#define pminh(rs, rt, rd) \
__
asm
__ __
volatile
__
("pminh " #rd ", " #rs ", " #rt )
asm
volatile ("pminh " #rd ", " #rs ", " #rt )
#define pinteh(rs, rt, rd) \
__
asm
__ __
volatile
__
("pinteh " #rd ", " #rs ", " #rt )
asm
volatile ("pinteh " #rd ", " #rs ", " #rt )
#define paddh(rs, rt, rd) \
__
asm
__ __
volatile
__
("paddh " #rd ", " #rs ", " #rt )
asm
volatile ("paddh " #rd ", " #rs ", " #rt )
#define psubh(rs, rt, rd) \
__
asm
__ __
volatile
__
("psubh " #rd ", " #rs ", " #rt )
asm
volatile ("psubh " #rd ", " #rs ", " #rt )
#define psrah(rt, sa, rd) \
__
asm
__ __
volatile
__
("psrah " #rd ", " #rt ", %0" : : "i"(sa) )
asm
volatile ("psrah " #rd ", " #rt ", %0" : : "i"(sa) )
#define pmfhl_uw(rd) \
__
asm
__ __
volatile
__
("pmfhl.uw " #rd)
asm
volatile ("pmfhl.uw " #rd)
#define pextlb(rs, rt, rd) \
__
asm
__ __
volatile
__
("pextlb " #rd ", " #rs ", " #rt )
asm
volatile ("pextlb " #rd ", " #rs ", " #rt )
#endif
/* FFMPEG_MMI_H */
libavcodec/sh4/idct_sh4.c
View file @
c88c253d
...
...
@@ -54,7 +54,7 @@ static const float odd_table[] __attribute__ ((aligned(8))) = {
#if defined(__SH4_SINGLE__) || defined(__SH4_SINGLE_ONLY__)
#define load_matrix(table) \
__
asm
__
volatile( \
asm volatile( \
" fschg\n" \
" fmov @%0+,xd0\n" \
" fmov @%0+,xd2\n" \
...
...
@@ -71,15 +71,15 @@ static const float odd_table[] __attribute__ ((aligned(8))) = {
)
#define ftrv() \
__
asm
__
volatile("ftrv xmtrx,fv0" \
asm volatile("ftrv xmtrx,fv0" \
: "=f"(fr0),"=f"(fr1),"=f"(fr2),"=f"(fr3) \
: "0"(fr0), "1"(fr1), "2"(fr2), "3"(fr3) );
#define DEFREG \
register float fr0
__
asm
__
("fr0"); \
register float fr1
__
asm
__
("fr1"); \
register float fr2
__
asm
__
("fr2"); \
register float fr3
__
asm
__
("fr3")
register float fr0 asm("fr0"); \
register float fr1 asm("fr1"); \
register float fr2 asm("fr2"); \
register float fr3 asm("fr3")
#else
...
...
libavcodec/sparc/vis.h
View file @
c88c253d
...
...
@@ -55,97 +55,97 @@
#define vis_rd_d(X) (vis_dreg(X) << 25)
#define vis_ss2s(opf,rs1,rs2,rd) \
__
asm
__ __
volatile
__
(".word %0" \
asm
volatile (".word %0" \
: : "i" (vis_opc_base | vis_opf(opf) | \
vis_rs1_s(rs1) | \
vis_rs2_s(rs2) | \
vis_rd_s(rd)))
#define vis_dd2d(opf,rs1,rs2,rd) \
__
asm
__ __
volatile
__
(".word %0" \
asm
volatile (".word %0" \
: : "i" (vis_opc_base | vis_opf(opf) | \
vis_rs1_d(rs1) | \
vis_rs2_d(rs2) | \
vis_rd_d(rd)))
#define vis_ss2d(opf,rs1,rs2,rd) \
__
asm
__ __
volatile
__
(".word %0" \
asm
volatile (".word %0" \
: : "i" (vis_opc_base | vis_opf(opf) | \
vis_rs1_s(rs1) | \
vis_rs2_s(rs2) | \
vis_rd_d(rd)))
#define vis_sd2d(opf,rs1,rs2,rd) \
__
asm
__ __
volatile
__
(".word %0" \
asm
volatile (".word %0" \
: : "i" (vis_opc_base | vis_opf(opf) | \
vis_rs1_s(rs1) | \
vis_rs2_d(rs2) | \
vis_rd_d(rd)))
#define vis_d2s(opf,rs2,rd) \
__
asm
__ __
volatile
__
(".word %0" \
asm
volatile (".word %0" \
: : "i" (vis_opc_base | vis_opf(opf) | \
vis_rs2_d(rs2) | \
vis_rd_s(rd)))
#define vis_s2d(opf,rs2,rd) \
__
asm
__ __
volatile
__
(".word %0" \
asm
volatile (".word %0" \
: : "i" (vis_opc_base | vis_opf(opf) | \
vis_rs2_s(rs2) | \
vis_rd_d(rd)))
#define vis_d12d(opf,rs1,rd) \
__
asm
__ __
volatile
__
(".word %0" \
asm
volatile (".word %0" \
: : "i" (vis_opc_base | vis_opf(opf) | \
vis_rs1_d(rs1) | \
vis_rd_d(rd)))
#define vis_d22d(opf,rs2,rd) \
__
asm
__ __
volatile
__
(".word %0" \
asm
volatile (".word %0" \
: : "i" (vis_opc_base | vis_opf(opf) | \
vis_rs2_d(rs2) | \
vis_rd_d(rd)))
#define vis_s12s(opf,rs1,rd) \
__
asm
__ __
volatile
__
(".word %0" \
asm
volatile (".word %0" \
: : "i" (vis_opc_base | vis_opf(opf) | \
vis_rs1_s(rs1) | \
vis_rd_s(rd)))
#define vis_s22s(opf,rs2,rd) \
__
asm
__ __
volatile
__
(".word %0" \
asm
volatile (".word %0" \
: : "i" (vis_opc_base | vis_opf(opf) | \
vis_rs2_s(rs2) | \
vis_rd_s(rd)))
#define vis_s(opf,rd) \
__
asm
__ __
volatile
__
(".word %0" \
asm
volatile (".word %0" \
: : "i" (vis_opc_base | vis_opf(opf) | \
vis_rd_s(rd)))
#define vis_d(opf,rd) \
__
asm
__ __
volatile
__
(".word %0" \
asm
volatile (".word %0" \
: : "i" (vis_opc_base | vis_opf(opf) | \
vis_rd_d(rd)))
#define vis_r2m(op,rd,mem) \
__
asm
__ __
volatile
__
(#op "\t%%f" #rd ", [%0]" : : "r" (&(mem)) )
asm
volatile (#op "\t%%f" #rd ", [%0]" : : "r" (&(mem)) )
#define vis_r2m_2(op,rd,mem1,mem2) \
__
asm
__ __
volatile
__
(#op "\t%%f" #rd ", [%0 + %1]" : : "r" (mem1), "r" (mem2) )
asm
volatile (#op "\t%%f" #rd ", [%0 + %1]" : : "r" (mem1), "r" (mem2) )
#define vis_m2r(op,mem,rd) \
__
asm
__ __
volatile
__
(#op "\t[%0], %%f" #rd : : "r" (&(mem)) )
asm
volatile (#op "\t[%0], %%f" #rd : : "r" (&(mem)) )
#define vis_m2r_2(op,mem1,mem2,rd) \
__
asm
__ __
volatile
__
(#op "\t[%0 + %1], %%f" #rd : : "r" (mem1), "r" (mem2) )
asm
volatile (#op "\t[%0 + %1], %%f" #rd : : "r" (mem1), "r" (mem2) )
static
inline
void
vis_set_gsr
(
unsigned
int
_val
)
{
register
unsigned
int
val
asm
(
"g1"
);
val
=
_val
;
__
asm
__
__
volatile
__
(
".word 0xa7804000"
asm
volatile
(
".word 0xa7804000"
:
:
"r"
(
val
));
}
...
...
@@ -166,7 +166,7 @@ static inline void vis_set_gsr(unsigned int _val)
#define vis_ldblk(mem, rd) \
do { register void *__mem asm("g1"); \
__mem = &(mem); \
__
asm
__ __
volatile
__
(".word 0xc1985e00 | %1" \
asm
volatile(".word 0xc1985e00 | %1" \
: \
: "r" (__mem), \