- 26 Sep, 2017 1 commit
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Shiyou Yin authored
1. vp8_copy_mem16x16_mmi 2. vp8_copy_mem8x8_mmi 3. vp8_copy_mem8x4_mmi Change-Id: I3de29a11fa7402df0e48bbb944440b1e66498a65
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- 21 Sep, 2017 1 commit
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Marco Paniconi authored
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- 20 Sep, 2017 6 commits
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Marco authored
Add the condition frames_since_golden > 0 to the early exit check for ARF usage in nonrd_pickmode. This improves quality of first frame following ARF, where frame_since_golden = 0. Small/neutral gain in metrics for speed 6, neutral change in speed. Only affects when USE_ALTREF_FOR_ONE_PASS is enabled. Change-Id: I82e73e6ff6fc849e5ca5448563cb8a0515fe0cdc
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James Zern authored
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Linfeng Zhang authored
A new bug was introduced in a80bdfd0 "Change sinpi_{1,2,3,4}_9 from tran_high_t to int16_t". Reverted the change in this file. BUG=webm:1450 Failed test C/TransHT.AccuracyCheck/26. Change-Id: Id001f57aad811803ef7d367d2b2bc008d8499991
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Marco Paniconi authored
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Scott LaVarnway authored
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James Zern authored
quiets nasm warning: label alone on a line without a colon might be in error BUG=webm:1462 Change-Id: I660407ca60e8c9a810dba9d76afb65852029a29c
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- 19 Sep, 2017 6 commits
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Scott LaVarnway authored
C vs SSE2 speed gains: _4x4 : ~2.94x C vs SSSE3 speed gains: _8x8 : ~8.69x _16x16 : ~6.32x _32x32 : ~5.33x BUG=webm:1411 Change-Id: I2c35b527eac2229f17aaa9d118fb601e7195efe4
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Marco authored
Modify simple_block_yrd condition in nonrd_pickmode for SVC: allow it to be used also on base temporal_layer, only when spatial_layer > 1 and block size < 32x32. Speed up of about ~2% for 3 layer SVC, with little/negligible loss in quality. Change-Id: I7734bdae51cf51f22b96f6b2b27da20ea1d84344
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Marco Paniconi authored
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Marco authored
Fix the setting to frames_till_gf_update_due, and adjust the limit value. Only affects when USE_ALTREF_FOR_ONE_PASS is enabled. Neutral change to metrics and speed for ytlive. Change-Id: I266d9a00b36221bc8602fa2746d4e8a8f7d4dfae
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Marco Paniconi authored
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Marco authored
Only when USE_ALT_REF_ONE_PASS is enabled (off by default). Force fixed partition to 64x64 when is_src_alt_ref_frame is true, and don't force early exit for some modes in nonrd_pickmode for ARF noshow frames. Small gain ~0.2% on ytlive metrics for speed 6. Neutral speed difference. Change-Id: I27eb6622d0453c09a06ccdc3b16368762474d11d
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- 18 Sep, 2017 2 commits
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Linfeng Zhang authored
Add "typedef int16_t tran_coef_t;" BUG=webm:1450 Change-Id: I67866f104898d1dda8989e1abdaf6983fe324154
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Linfeng Zhang authored
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- 15 Sep, 2017 6 commits
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Shiyou Yin authored
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Marco authored
Add datarate test, for both VBR and CBR mode, with the frame_parallel_decoding mode disabled (and error_resilience off). Change-Id: I54feec3248a68ecff4bef8d9a31bb1616fab77df
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Paul Wilkins authored
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Kaustubh Raste authored
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James Zern authored
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James Zern authored
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- 14 Sep, 2017 7 commits
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Hui Su authored
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James Zern authored
Change-Id: I9dfe8255d1c096d246bf9719729f57dbae779ffc
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James Zern authored
This reverts commit afee58f2. This causes ~8x slowdown in 4:3 in the C-code Change-Id: I60a7ead12dc4ec1548b1b12cfe4b0be42ef04e0e
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Hui Su authored
In the new AUTO mode, restrict the minimum alt-ref interval and max column tiles adaptively based on picture size, while not applying any rate control constraints. This mode aims to produce encodings that fit into levels corresponding to the source picture size, with minimum compression quality lost. However, the bitstream is not guaranteed to be level compatible, e.g., the average bitrate may exceed level limit. BUG=b/64451920 Change-Id: I02080b169cbbef4ab2e08c0df4697ce894aad83c
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Shiyou Yin authored
1. vp8_dequantize_b_mmi 2. vp8_dequant_idct_add_mmi Change-Id: I505f8afb7a444173392b325906e6a4f420f00709
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Shiyou Yin authored
1. vp8_short_idct4x4llm_mmi 2. vp8_short_inv_walsh4x4_mmi 3. vp8_dc_only_idct_add_mmi Change-Id: I616923681e79d78607a4988608fc39df77b093f4
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Kaustubh Raste authored
Removed inline for GP load-store in case of (__mips_isa_rev >= 6) Created one define LD_V for vector load and ST_V for vector store Change-Id: Ifec3570fa18346e39791b0dd622892e5c18bd448
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- 13 Sep, 2017 5 commits
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Linfeng Zhang authored
Change-Id: I1bf57824e07fa4f8b3b5574984117f2bd7a1c086
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Linfeng Zhang authored
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Johann Koenig authored
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Kaustubh Raste authored
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Shiyou Yin authored
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- 12 Sep, 2017 3 commits
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Johann authored
This reverts commit 8c42237b. Because ssse3 code is used for the reference, the qcoeff and dqcoeff reference buffers must be aligned. Original change's description: > quantize avx: copy 32x32 implementation > > Ensure avx and ssse3 stay in sync by testing them against each other. > > Change-Id: I699f3b48785c83260825402d7826231f475f697c Change-Id: Ieeef11b9406964194028b0d81d84bcb63296ae06
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Linfeng Zhang authored
Scale 3x3 block instead of 16x16 block in each loop. Benefits: 1. Reduced number of different phase_scaler from 16 to 3. Optimization code will be smaller and faster. 2. The maximum phase_scaler drifting will be reduced from 5/16 to 1/24. (The drifting is 1/(3*16) in each step.) BUG=webm:1419 Change-Id: Ibb9242a629ddb03e1ff93b859bece738255e698c
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Kaustubh Raste authored
Load the specific destination loads instead of vector load Change-Id: I65ca13ae8f608fad07121fef848e2a18f54171fe
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- 11 Sep, 2017 3 commits
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Scott LaVarnway authored
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Linfeng Zhang authored
BUG=webm:1419 Change-Id: If82a93935d2453e61b7647aae70983db1740bec7
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Scott LaVarnway authored
C vs SSE2 speed gains: _4x4 : ~2.31x C vs SSSE3 speed gains: _8x8 : ~4.73x _16x16 : ~10.88x _32x32 : ~4.80x BUG=webm:1411 Change-Id: I0bac29db261079181ddabc6814bd62c463109caf
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