Commit 4e81a68a authored by Paul Wilkins's avatar Paul Wilkins

Further activity masking changes:

Some further re-structuring of activity masking code.
Still has various experimental switches.
Supports a metric based on intra encode.
Experimental comparison against a fixed activity target  rather
than a frame average, for altering rd and zbin.

Overall the SSIM performance is similar  to TT's original
code but there is a much smaller PSNR hit of circa
0.5% instead of 3.2%

Change-Id: I0fd53b2dfb60620b3f74d7415e0b81c1ac58c39a
parent 7368dd4f
This diff is collapsed.
......@@ -114,8 +114,6 @@ THREAD_FUNCTION thread_encoding_proc(void *p_data)
// Set the mb activity pointer to the start of the row.
x->mb_activity_ptr = &cpi->mb_activity_map[map_index];
x->mb_norm_activity_ptr =
&cpi->mb_norm_activity_map[map_index];
// for each macroblock col in image
for (mb_col = 0; mb_col < cm->mb_cols; mb_col++)
......@@ -230,7 +228,6 @@ THREAD_FUNCTION thread_encoding_proc(void *p_data)
// Increment the activity mask pointers.
x->mb_activity_ptr++;
x->mb_norm_activity_ptr++;
/* save the block info */
for (i = 0; i < 16; i++)
......
......@@ -81,7 +81,7 @@ static const int cq_level[QINDEX_RANGE] =
static void find_next_key_frame(VP8_COMP *cpi, FIRSTPASS_STATS *this_frame);
static int encode_intra(VP8_COMP *cpi, MACROBLOCK *x, int use_dc_pred)
int encode_intra(VP8_COMP *cpi, MACROBLOCK *x, int use_dc_pred)
{
int i;
......
......@@ -47,8 +47,8 @@
#define MIN_THRESHMULT 32
#define MAX_THRESHMULT 512
#define GF_ZEROMV_ZBIN_BOOST 24
#define LF_ZEROMV_ZBIN_BOOST 12
#define GF_ZEROMV_ZBIN_BOOST 12
#define LF_ZEROMV_ZBIN_BOOST 6
#define MV_ZBIN_BOOST 4
#define ZBIN_OQ_MAX 192
......
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