Commit 7d82e57f authored by Shiyou Yin's avatar Shiyou Yin

vpx_dsp:loongson optimize vpx_subtract_block_c (case 4x4,8x8,16x16) with mmi.

Change-Id: Ia120ad1064d0b6106d9685cf075bdab373eef19e
parent 0e87b160
......@@ -131,6 +131,7 @@ Sean McGovern <gseanmcg@gmail.com>
Sergey Kolomenkin <kolomenkin@gmail.com>
Sergey Ulanov <sergeyu@chromium.org>
Shimon Doodkin <helpmepro1@gmail.com>
Shiyou Yin <yinshiyou-hf@loongson.cn>
Shunyao Li <shunyaoli@google.com>
Stefan Holmer <holmer@google.com>
Suman Sunkara <sunkaras@google.com>
......
......@@ -101,4 +101,9 @@ INSTANTIATE_TEST_CASE_P(MSA, VP9SubtractBlockTest,
::testing::Values(vpx_subtract_block_msa));
#endif
#if HAVE_MMI
INSTANTIATE_TEST_CASE_P(MMI, VP9SubtractBlockTest,
::testing::Values(vpx_subtract_block_mmi));
#endif
} // namespace vp9
This diff is collapsed.
......@@ -314,6 +314,8 @@ DSP_SRCS-$(HAVE_NEON) += arm/subtract_neon.c
DSP_SRCS-$(HAVE_MSA) += mips/sad_msa.c
DSP_SRCS-$(HAVE_MSA) += mips/subtract_msa.c
DSP_SRCS-$(HAVE_MMI) += mips/subtract_mmi.c
DSP_SRCS-$(HAVE_SSE3) += x86/sad_sse3.asm
DSP_SRCS-$(HAVE_SSSE3) += x86/sad_ssse3.asm
DSP_SRCS-$(HAVE_SSE4_1) += x86/sad_sse4.asm
......
......@@ -691,7 +691,7 @@ if (vpx_config("CONFIG_ENCODERS") eq "yes") {
# Block subtraction
#
add_proto qw/void vpx_subtract_block/, "int rows, int cols, int16_t *diff_ptr, ptrdiff_t diff_stride, const uint8_t *src_ptr, ptrdiff_t src_stride, const uint8_t *pred_ptr, ptrdiff_t pred_stride";
specialize qw/vpx_subtract_block neon msa sse2/;
specialize qw/vpx_subtract_block neon msa mmi sse2/;
#
# Single block SAD
......
/*
* Copyright (c) 2017 The WebM project authors. All Rights Reserved.
*
* Use of this source code is governed by a BSD-style license
* that can be found in the LICENSE file in the root of the source
* tree. An additional intellectual property rights grant can be found
* in the file PATENTS. All contributing project authors may
* be found in the AUTHORS file in the root of the source tree.
*/
#ifndef VPX_PORTS_ASMDEFS_MMI_H_
#define VPX_PORTS_ASMDEFS_MMI_H_
#include "./vpx_config.h"
#include "vpx/vpx_integer.h"
#if HAVE_MMI
#if HAVE_MIPS64
#define mips_reg int64_t
#define MMI_ADDU(reg1, reg2, reg3) \
"daddu " #reg1 ", " #reg2 ", " #reg3 " \n\t"
#define MMI_ADDIU(reg1, reg2, immediate) \
"daddiu " #reg1 ", " #reg2 ", " #immediate " \n\t"
#define MMI_ADDI(reg1, reg2, immediate) \
"daddi " #reg1 ", " #reg2 ", " #immediate " \n\t"
#define MMI_SUBU(reg1, reg2, reg3) \
"dsubu " #reg1 ", " #reg2 ", " #reg3 " \n\t"
#define MMI_L(reg, addr, bias) \
"ld " #reg ", " #bias "(" #addr ") \n\t"
#define MMI_SRL(reg1, reg2, shift) \
"dsrl " #reg1 ", " #reg2 ", " #shift " \n\t"
#define MMI_SLL(reg1, reg2, shift) \
"dsll " #reg1 ", " #reg2 ", " #shift " \n\t"
#define MMI_MTC1(reg, fp) \
"dmtc1 " #reg " " #fp " \n\t"
#define MMI_LI(reg, immediate) \
"dli " #reg " " #immediate " \n\t"
#else
#define mips_reg int32_t
#define MMI_ADDU(reg1, reg2, reg3) \
"addu " #reg1 ", " #reg2 ", " #reg3 " \n\t"
#define MMI_ADDIU(reg1, reg2, immediate) \
"addiu " #reg1 ", " #reg2 ", " #immediate " \n\t"
#define MMI_ADDI(reg1, reg2, immediate) \
"addi " #reg1 ", " #reg2 ", " #immediate " \n\t"
#define MMI_SUBU(reg1, reg2, reg3) \
"subu " #reg1 ", " #reg2 ", " #reg3 " \n\t"
#define MMI_L(reg, addr, bias) \
"lw " #reg ", " #bias "(" #addr ") \n\t"
#define MMI_SRL(reg1, reg2, shift) \
"srl " #reg1 ", " #reg2 ", " #shift " \n\t"
#define MMI_SLL(reg1, reg2, shift) \
"sll " #reg1 ", " #reg2 ", " #shift " \n\t"
#define MMI_MTC1(reg, fp) \
"mtc1 " #reg " " #fp " \n\t"
#define MMI_LI(reg, immediate) \
"li " #reg " " #immediate " \n\t"
#endif /* HAVE_MIPS64 */
#endif /* HAVE_MMI */
#endif /* VPX_PORTS_ASMDEFS_MMI_H_ */
......@@ -28,3 +28,7 @@ PORTS_SRCS-$(ARCH_ARM) += arm.h
PORTS_SRCS-$(ARCH_PPC) += ppc_cpudetect.c
PORTS_SRCS-$(ARCH_PPC) += ppc.h
ifeq ($(ARCH_MIPS), yes)
PORTS_SRCS-yes += asmdefs_mmi.h
endif
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