Commit bc98e93b authored by Johann's avatar Johann

Remove PPC build support

There are no functional optimizations for AltiVec/PPC

Change-Id: I6877a7a9739017fe36fc769be22679c65ea99976
parent b8a1de86
......@@ -62,12 +62,6 @@ COMPILING THE APPLICATIONS/LIBRARIES:
armv7s-darwin-gcc
mips32-linux-gcc
mips64-linux-gcc
ppc32-darwin8-gcc
ppc32-darwin9-gcc
ppc32-linux-gcc
ppc64-darwin8-gcc
ppc64-darwin9-gcc
ppc64-linux-gcc
sparc-solaris-gcc
x86-android-gcc
x86-darwin8-gcc
......
......@@ -640,12 +640,6 @@ process_common_toolchain() {
*i[3456]86*)
tgt_isa=x86
;;
*powerpc64*)
tgt_isa=ppc64
;;
*powerpc*)
tgt_isa=ppc32
;;
*sparc*)
tgt_isa=sparc
;;
......@@ -1070,29 +1064,6 @@ EOF
check_add_asflags -march=${tgt_isa}
check_add_asflags -KPIC
;;
ppc*)
enable_feature ppc
bits=${tgt_isa##ppc}
link_with_cc=gcc
setup_gnu_toolchain
add_asflags -force_cpusubtype_ALL -I"\$(dir \$<)darwin"
soft_enable altivec
enabled altivec && add_cflags -maltivec
case "$tgt_os" in
linux*)
add_asflags -maltivec -mregnames -I"\$(dir \$<)linux"
;;
darwin*)
darwin_arch="-arch ppc"
enabled ppc64 && darwin_arch="${darwin_arch}64"
add_cflags ${darwin_arch} -m${bits} -fasm-blocks
add_asflags ${darwin_arch} -force_cpusubtype_ALL -I"\$(dir \$<)darwin"
add_ldflags ${darwin_arch} -m${bits}
enabled altivec && add_cflags -faltivec
;;
esac
;;
x86*)
case ${tgt_os} in
win*)
......
......@@ -112,12 +112,6 @@ all_platforms="${all_platforms} armv7-win32-vs12"
all_platforms="${all_platforms} armv7s-darwin-gcc"
all_platforms="${all_platforms} mips32-linux-gcc"
all_platforms="${all_platforms} mips64-linux-gcc"
all_platforms="${all_platforms} ppc32-darwin8-gcc"
all_platforms="${all_platforms} ppc32-darwin9-gcc"
all_platforms="${all_platforms} ppc32-linux-gcc"
all_platforms="${all_platforms} ppc64-darwin8-gcc"
all_platforms="${all_platforms} ppc64-darwin9-gcc"
all_platforms="${all_platforms} ppc64-linux-gcc"
all_platforms="${all_platforms} sparc-solaris-gcc"
all_platforms="${all_platforms} x86-android-gcc"
all_platforms="${all_platforms} x86-darwin8-gcc"
......@@ -247,8 +241,6 @@ ARCH_LIST="
mips
x86
x86_64
ppc32
ppc64
"
ARCH_EXT_LIST="
edsp
......@@ -621,12 +613,6 @@ process_toolchain() {
universal-darwin*)
darwin_ver=${tgt_os##darwin}
# Snow Leopard (10.6/darwin10) dropped support for PPC
# Include PPC support for all prior versions
if [ $darwin_ver -lt 10 ]; then
fat_bin_archs="$fat_bin_archs ppc32-${tgt_os}-gcc"
fi
# Tiger (10.4/darwin8) brought support for x86
if [ $darwin_ver -ge 8 ]; then
fat_bin_archs="$fat_bin_archs x86-${tgt_os}-${tgt_cc}"
......@@ -727,7 +713,7 @@ process_toolchain() {
esac
# Other toolchain specific defaults
case $toolchain in x86*|ppc*|universal*) soft_enable postproc;; esac
case $toolchain in x86*|universal*) soft_enable postproc;; esac
if enabled postproc_visualizer; then
enabled postproc || die "postproc_visualizer requires postproc to be enabled"
......
;
; Copyright (c) 2010 The WebM project authors. All Rights Reserved.
;
; Use of this source code is governed by a BSD-style license
; that can be found in the LICENSE file in the root of the source
; tree. An additional intellectual property rights grant can be found
; in the file PATENTS. All contributing project authors may
; be found in the AUTHORS file in the root of the source tree.
;
.globl copy_mem16x16_ppc
;# r3 unsigned char *src
;# r4 int src_stride
;# r5 unsigned char *dst
;# r6 int dst_stride
;# Make the assumption that input will not be aligned,
;# but the output will be. So two reads and a perm
;# for the input, but only one store for the output.
copy_mem16x16_ppc:
mfspr r11, 256 ;# get old VRSAVE
oris r12, r11, 0xe000
mtspr 256, r12 ;# set VRSAVE
li r10, 16
mtctr r10
cp_16x16_loop:
lvsl v0, 0, r3 ;# permutate value for alignment
lvx v1, 0, r3
lvx v2, r10, r3
vperm v1, v1, v2, v0
stvx v1, 0, r5
add r3, r3, r4 ;# increment source pointer
add r5, r5, r6 ;# increment destination pointer
bdnz cp_16x16_loop
mtspr 256, r11 ;# reset old VRSAVE
blr
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;
; Copyright (c) 2010 The WebM project authors. All Rights Reserved.
;
; Use of this source code is governed by a BSD-style license
; that can be found in the LICENSE file in the root of the source
; tree. An additional intellectual property rights grant can be found
; in the file PATENTS. All contributing project authors may
; be found in the AUTHORS file in the root of the source tree.
;
.globl short_idct4x4llm_ppc
.macro load_c V, LABEL, OFF, R0, R1
lis \R0, \LABEL@ha
la \R1, \LABEL@l(\R0)
lvx \V, \OFF, \R1
.endm
;# r3 short *input
;# r4 short *output
;# r5 int pitch
.align 2
short_idct4x4llm_ppc:
mfspr r11, 256 ;# get old VRSAVE
oris r12, r11, 0xfff8
mtspr 256, r12 ;# set VRSAVE
load_c v8, sinpi8sqrt2, 0, r9, r10
load_c v9, cospi8sqrt2minus1, 0, r9, r10
load_c v10, hi_hi, 0, r9, r10
load_c v11, lo_lo, 0, r9, r10
load_c v12, shift_16, 0, r9, r10
li r10, 16
lvx v0, 0, r3 ;# input ip[0], ip[ 4]
lvx v1, r10, r3 ;# input ip[8], ip[12]
;# first pass
vupkhsh v2, v0
vupkhsh v3, v1
vaddsws v6, v2, v3 ;# a1 = ip[0]+ip[8]
vsubsws v7, v2, v3 ;# b1 = ip[0]-ip[8]
vupklsh v0, v0
vmulosh v4, v0, v8
vsraw v4, v4, v12
vaddsws v4, v4, v0 ;# ip[ 4] * sin(pi/8) * sqrt(2)
vupklsh v1, v1
vmulosh v5, v1, v9
vsraw v5, v5, v12 ;# ip[12] * cos(pi/8) * sqrt(2)
vaddsws v5, v5, v1
vsubsws v4, v4, v5 ;# c1
vmulosh v3, v1, v8
vsraw v3, v3, v12
vaddsws v3, v3, v1 ;# ip[12] * sin(pi/8) * sqrt(2)
vmulosh v5, v0, v9
vsraw v5, v5, v12 ;# ip[ 4] * cos(pi/8) * sqrt(2)
vaddsws v5, v5, v0
vaddsws v3, v3, v5 ;# d1
vaddsws v0, v6, v3 ;# a1 + d1
vsubsws v3, v6, v3 ;# a1 - d1
vaddsws v1, v7, v4 ;# b1 + c1
vsubsws v2, v7, v4 ;# b1 - c1
;# transpose input
vmrghw v4, v0, v1 ;# a0 b0 a1 b1
vmrghw v5, v2, v3 ;# c0 d0 c1 d1
vmrglw v6, v0, v1 ;# a2 b2 a3 b3
vmrglw v7, v2, v3 ;# c2 d2 c3 d3
vperm v0, v4, v5, v10 ;# a0 b0 c0 d0
vperm v1, v4, v5, v11 ;# a1 b1 c1 d1
vperm v2, v6, v7, v10 ;# a2 b2 c2 d2
vperm v3, v6, v7, v11 ;# a3 b3 c3 d3
;# second pass
vaddsws v6, v0, v2 ;# a1 = ip[0]+ip[8]
vsubsws v7, v0, v2 ;# b1 = ip[0]-ip[8]
vmulosh v4, v1, v8
vsraw v4, v4, v12
vaddsws v4, v4, v1 ;# ip[ 4] * sin(pi/8) * sqrt(2)
vmulosh v5, v3, v9
vsraw v5, v5, v12 ;# ip[12] * cos(pi/8) * sqrt(2)
vaddsws v5, v5, v3
vsubsws v4, v4, v5 ;# c1
vmulosh v2, v3, v8
vsraw v2, v2, v12
vaddsws v2, v2, v3 ;# ip[12] * sin(pi/8) * sqrt(2)
vmulosh v5, v1, v9
vsraw v5, v5, v12 ;# ip[ 4] * cos(pi/8) * sqrt(2)
vaddsws v5, v5, v1
vaddsws v3, v2, v5 ;# d1
vaddsws v0, v6, v3 ;# a1 + d1
vsubsws v3, v6, v3 ;# a1 - d1
vaddsws v1, v7, v4 ;# b1 + c1
vsubsws v2, v7, v4 ;# b1 - c1
vspltish v6, 4
vspltish v7, 3
vpkswss v0, v0, v1
vpkswss v1, v2, v3
vaddshs v0, v0, v6
vaddshs v1, v1, v6
vsrah v0, v0, v7
vsrah v1, v1, v7
;# transpose output
vmrghh v2, v0, v1 ;# a0 c0 a1 c1 a2 c2 a3 c3
vmrglh v3, v0, v1 ;# b0 d0 b1 d1 b2 d2 b3 d3
vmrghh v0, v2, v3 ;# a0 b0 c0 d0 a1 b1 c1 d1
vmrglh v1, v2, v3 ;# a2 b2 c2 d2 a3 b3 c3 d3
stwu r1,-416(r1) ;# create space on the stack
stvx v0, 0, r1
lwz r6, 0(r1)
stw r6, 0(r4)
lwz r6, 4(r1)
stw r6, 4(r4)
add r4, r4, r5
lwz r6, 8(r1)
stw r6, 0(r4)
lwz r6, 12(r1)
stw r6, 4(r4)
add r4, r4, r5
stvx v1, 0, r1
lwz r6, 0(r1)
stw r6, 0(r4)
lwz r6, 4(r1)
stw r6, 4(r4)
add r4, r4, r5
lwz r6, 8(r1)
stw r6, 0(r4)
lwz r6, 12(r1)
stw r6, 4(r4)
addi r1, r1, 416 ;# recover stack
mtspr 256, r11 ;# reset old VRSAVE
blr
.align 4
sinpi8sqrt2:
.short 35468, 35468, 35468, 35468, 35468, 35468, 35468, 35468
.align 4
cospi8sqrt2minus1:
.short 20091, 20091, 20091, 20091, 20091, 20091, 20091, 20091
.align 4
shift_16:
.long 16, 16, 16, 16
.align 4
hi_hi:
.byte 0, 1, 2, 3, 4, 5, 6, 7, 16, 17, 18, 19, 20, 21, 22, 23
.align 4
lo_lo:
.byte 8, 9, 10, 11, 12, 13, 14, 15, 24, 25, 26, 27, 28, 29, 30, 31
/*
* Copyright (c) 2010 The WebM project authors. All Rights Reserved.
*
* Use of this source code is governed by a BSD-style license
* that can be found in the LICENSE file in the root of the source
* tree. An additional intellectual property rights grant can be found
* in the file PATENTS. All contributing project authors may
* be found in the AUTHORS file in the root of the source tree.
*/
#include "loopfilter.h"
#include "onyxc_int.h"
typedef void loop_filter_function_y_ppc
(
unsigned char *s, // source pointer
int p, // pitch
const signed char *flimit,
const signed char *limit,
const signed char *thresh
);
typedef void loop_filter_function_uv_ppc
(
unsigned char *u, // source pointer
unsigned char *v, // source pointer
int p, // pitch
const signed char *flimit,
const signed char *limit,
const signed char *thresh
);
typedef void loop_filter_function_s_ppc
(
unsigned char *s, // source pointer
int p, // pitch
const signed char *flimit
);
loop_filter_function_y_ppc mbloop_filter_horizontal_edge_y_ppc;
loop_filter_function_y_ppc mbloop_filter_vertical_edge_y_ppc;
loop_filter_function_y_ppc loop_filter_horizontal_edge_y_ppc;
loop_filter_function_y_ppc loop_filter_vertical_edge_y_ppc;
loop_filter_function_uv_ppc mbloop_filter_horizontal_edge_uv_ppc;
loop_filter_function_uv_ppc mbloop_filter_vertical_edge_uv_ppc;
loop_filter_function_uv_ppc loop_filter_horizontal_edge_uv_ppc;
loop_filter_function_uv_ppc loop_filter_vertical_edge_uv_ppc;
loop_filter_function_s_ppc loop_filter_simple_horizontal_edge_ppc;
loop_filter_function_s_ppc loop_filter_simple_vertical_edge_ppc;
// Horizontal MB filtering
void loop_filter_mbh_ppc(unsigned char *y_ptr, unsigned char *u_ptr, unsigned char *v_ptr,
int y_stride, int uv_stride, loop_filter_info *lfi)
{
mbloop_filter_horizontal_edge_y_ppc(y_ptr, y_stride, lfi->mbflim, lfi->lim, lfi->thr);
if (u_ptr)
mbloop_filter_horizontal_edge_uv_ppc(u_ptr, v_ptr, uv_stride, lfi->mbflim, lfi->lim, lfi->thr);
}
void loop_filter_mbhs_ppc(unsigned char *y_ptr, unsigned char *u_ptr, unsigned char *v_ptr,
int y_stride, int uv_stride, loop_filter_info *lfi)
{
(void)u_ptr;
(void)v_ptr;
(void)uv_stride;
loop_filter_simple_horizontal_edge_ppc(y_ptr, y_stride, lfi->mbflim);
}
// Vertical MB Filtering
void loop_filter_mbv_ppc(unsigned char *y_ptr, unsigned char *u_ptr, unsigned char *v_ptr,
int y_stride, int uv_stride, loop_filter_info *lfi)
{
mbloop_filter_vertical_edge_y_ppc(y_ptr, y_stride, lfi->mbflim, lfi->lim, lfi->thr);
if (u_ptr)
mbloop_filter_vertical_edge_uv_ppc(u_ptr, v_ptr, uv_stride, lfi->mbflim, lfi->lim, lfi->thr);
}
void loop_filter_mbvs_ppc(unsigned char *y_ptr, unsigned char *u_ptr, unsigned char *v_ptr,
int y_stride, int uv_stride, loop_filter_info *lfi)
{
(void)u_ptr;
(void)v_ptr;
(void)uv_stride;
loop_filter_simple_vertical_edge_ppc(y_ptr, y_stride, lfi->mbflim);
}
// Horizontal B Filtering
void loop_filter_bh_ppc(unsigned char *y_ptr, unsigned char *u_ptr, unsigned char *v_ptr,
int y_stride, int uv_stride, loop_filter_info *lfi)
{
// These should all be done at once with one call, instead of 3
loop_filter_horizontal_edge_y_ppc(y_ptr + 4 * y_stride, y_stride, lfi->flim, lfi->lim, lfi->thr);
loop_filter_horizontal_edge_y_ppc(y_ptr + 8 * y_stride, y_stride, lfi->flim, lfi->lim, lfi->thr);
loop_filter_horizontal_edge_y_ppc(y_ptr + 12 * y_stride, y_stride, lfi->flim, lfi->lim, lfi->thr);
if (u_ptr)
loop_filter_horizontal_edge_uv_ppc(u_ptr + 4 * uv_stride, v_ptr + 4 * uv_stride, uv_stride, lfi->flim, lfi->lim, lfi->thr);
}
void loop_filter_bhs_ppc(unsigned char *y_ptr, unsigned char *u_ptr, unsigned char *v_ptr,
int y_stride, int uv_stride, loop_filter_info *lfi)
{
(void)u_ptr;
(void)v_ptr;
(void)uv_stride;
loop_filter_simple_horizontal_edge_ppc(y_ptr + 4 * y_stride, y_stride, lfi->flim);
loop_filter_simple_horizontal_edge_ppc(y_ptr + 8 * y_stride, y_stride, lfi->flim);
loop_filter_simple_horizontal_edge_ppc(y_ptr + 12 * y_stride, y_stride, lfi->flim);
}
// Vertical B Filtering
void loop_filter_bv_ppc(unsigned char *y_ptr, unsigned char *u_ptr, unsigned char *v_ptr,
int y_stride, int uv_stride, loop_filter_info *lfi)
{
loop_filter_vertical_edge_y_ppc(y_ptr, y_stride, lfi->flim, lfi->lim, lfi->thr);
if (u_ptr)
loop_filter_vertical_edge_uv_ppc(u_ptr + 4, v_ptr + 4, uv_stride, lfi->flim, lfi->lim, lfi->thr);
}
void loop_filter_bvs_ppc(unsigned char *y_ptr, unsigned char *u_ptr, unsigned char *v_ptr,
int y_stride, int uv_stride, loop_filter_info *lfi)
{
(void)u_ptr;
(void)v_ptr;
(void)uv_stride;
loop_filter_simple_vertical_edge_ppc(y_ptr + 4, y_stride, lfi->flim);
loop_filter_simple_vertical_edge_ppc(y_ptr + 8, y_stride, lfi->flim);
loop_filter_simple_vertical_edge_ppc(y_ptr + 12, y_stride, lfi->flim);
}
This diff is collapsed.
;
; Copyright (c) 2010 The WebM project authors. All Rights Reserved.
;
; Use of this source code is governed by a BSD-style license
; that can be found in the LICENSE file in the root of the source
; tree. An additional intellectual property rights grant can be found
; in the file PATENTS. All contributing project authors may
; be found in the AUTHORS file in the root of the source tree.
;
.globl save_platform_context
.globl restore_platform_context
.macro W V P
stvx \V, 0, \P
addi \P, \P, 16
.endm
.macro R V P
lvx \V, 0, \P
addi \P, \P, 16
.endm
;# r3 context_ptr
.align 2
save_platform_contex:
W v20, r3
W v21, r3
W v22, r3
W v23, r3
W v24, r3
W v25, r3
W v26, r3
W v27, r3
W v28, r3
W v29, r3
W v30, r3
W v31, r3
blr
;# r3 context_ptr
.align 2
restore_platform_context:
R v20, r3
R v21, r3
R v22, r3
R v23, r3
R v24, r3
R v25, r3
R v26, r3
R v27, r3
R v28, r3
R v29, r3
R v30, r3
R v31, r3
blr
;
; Copyright (c) 2010 The WebM project authors. All Rights Reserved.
;
; Use of this source code is governed by a BSD-style license
; that can be found in the LICENSE file in the root of the source
; tree. An additional intellectual property rights grant can be found
; in the file PATENTS. All contributing project authors may
; be found in the AUTHORS file in the root of the source tree.
;
.globl recon4b_ppc
.globl recon2b_ppc
.globl recon_b_ppc
.macro row_of16 Diff Pred Dst Stride
lvx v1, 0, \Pred ;# v1 = pred = p0..p15
addi \Pred, \Pred, 16 ;# next pred
vmrghb v2, v0, v1 ;# v2 = 16-bit p0..p7
lvx v3, 0, \Diff ;# v3 = d0..d7
vaddshs v2, v2, v3 ;# v2 = r0..r7
vmrglb v1, v0, v1 ;# v1 = 16-bit p8..p15
lvx v3, r8, \Diff ;# v3 = d8..d15
addi \Diff, \Diff, 32 ;# next diff
vaddshs v3, v3, v1 ;# v3 = r8..r15
vpkshus v2, v2, v3 ;# v2 = 8-bit r0..r15
stvx v2, 0, \Dst ;# to dst
add \Dst, \Dst, \Stride ;# next dst
.endm
.text
.align 2
;# r3 = short *diff_ptr,
;# r4 = unsigned char *pred_ptr,
;# r5 = unsigned char *dst_ptr,
;# r6 = int stride
recon4b_ppc:
mfspr r0, 256 ;# get old VRSAVE
stw r0, -8(r1) ;# save old VRSAVE to stack
oris r0, r0, 0xf000
mtspr 256,r0 ;# set VRSAVE
vxor v0, v0, v0
li r8, 16
row_of16 r3, r4, r5, r6
row_of16 r3, r4, r5, r6
row_of16 r3, r4, r5, r6
row_of16 r3, r4, r5, r6
lwz r12, -8(r1) ;# restore old VRSAVE from stack
mtspr 256, r12 ;# reset old VRSAVE
blr
.macro two_rows_of8 Diff Pred Dst Stride write_first_four_pels
lvx v1, 0, \Pred ;# v1 = pred = p0..p15
vmrghb v2, v0, v1 ;# v2 = 16-bit p0..p7
lvx v3, 0, \Diff ;# v3 = d0..d7
vaddshs v2, v2, v3 ;# v2 = r0..r7
vmrglb v1, v0, v1 ;# v1 = 16-bit p8..p15
lvx v3, r8, \Diff ;# v2 = d8..d15
vaddshs v3, v3, v1 ;# v3 = r8..r15
vpkshus v2, v2, v3 ;# v3 = 8-bit r0..r15
stvx v2, 0, r10 ;# 2 rows to dst from buf
lwz r0, 0(r10)
.if \write_first_four_pels
stw r0, 0(\Dst)
.else
stwux r0, \Dst, \Stride
.endif
lwz r0, 4(r10)
stw r0, 4(\Dst)
lwz r0, 8(r10)
stwux r0, \Dst, \Stride ;# advance dst to next row
lwz r0, 12(r10)
stw r0, 4(\Dst)
.endm
.align 2
;# r3 = short *diff_ptr,
;# r4 = unsigned char *pred_ptr,
;# r5 = unsigned char *dst_ptr,
;# r6 = int stride
recon2b_ppc:
mfspr r0, 256 ;# get old VRSAVE
stw r0, -8(r1) ;# save old VRSAVE to stack
oris r0, r0, 0xf000
mtspr 256,r0 ;# set VRSAVE
vxor v0, v0, v0
li r8, 16
la r10, -48(r1) ;# buf
two_rows_of8 r3, r4, r5, r6, 1
addi r4, r4, 16; ;# next pred
addi r3, r3, 32; ;# next diff
two_rows_of8 r3, r4, r5, r6, 0
lwz r12, -8(r1) ;# restore old VRSAVE from stack
mtspr 256, r12 ;# reset old VRSAVE
blr
.macro get_two_diff_rows
stw r0, 0(r10)
lwz r0, 4(r3)
stw r0, 4(r10)
lwzu r0, 32(r3)
stw r0, 8(r10)
lwz r0, 4(r3)
stw r0, 12(r10)
lvx v3, 0, r10
.endm
.align 2
;# r3 = short *diff_ptr,
;# r4 = unsigned char *pred_ptr,
;# r5 = unsigned char *dst_ptr,
;# r6 = int stride
recon_b_ppc:
mfspr r0, 256 ;# get old VRSAVE
stw r0, -8(r1) ;# save old VRSAVE to stack
oris r0, r0, 0xf000
mtspr 256,r0 ;# set VRSAVE
vxor v0, v0, v0
la r10, -48(r1) ;# buf
lwz r0, 0(r4)
stw r0, 0(r10)
lwz r0, 16(r4)
stw r0, 4(r10)
lwz r0, 32(r4)
stw r0, 8(r10)
lwz r0, 48(r4)
stw r0, 12(r10)
lvx v1, 0, r10; ;# v1 = pred = p0..p15
lwz r0, 0(r3) ;# v3 = d0..d7
get_two_diff_rows
vmrghb v2, v0, v1; ;# v2 = 16-bit p0..p7
vaddshs v2, v2, v3; ;# v2 = r0..r7
lwzu r0, 32(r3) ;# v3 = d8..d15
get_two_diff_rows
vmrglb v1, v0, v1; ;# v1 = 16-bit p8..p15
vaddshs v3, v3, v1; ;# v3 = r8..r15
vpkshus v2, v2, v3; ;# v2 = 8-bit r0..r15
stvx v2, 0, r10; ;# 16 pels to dst from buf
lwz r0, 0(r10)
stw r0, 0(r5)
lwz r0, 4(r10)
stwux r0, r5, r6
lwz r0, 8(r10)
stwux r0, r5, r6
lwz r0, 12(r10)
stwx r0, r5, r6
lwz r12, -8(r1) ;# restore old VRSAVE from stack
mtspr 256, r12 ;# reset old VRSAVE
blr
;
; Copyright (c) 2010 The WebM project authors. All Rights Reserved.
;
; Use of this source code is governed by a BSD-style license
; that can be found in the LICENSE file in the root of the source
; tree. An additional intellectual property rights grant can be found