1. 16 Nov, 2012 1 commit
  2. 01 Nov, 2012 1 commit
  3. 06 Mar, 2012 1 commit
  4. 30 Jan, 2012 5 commits
    • John Koleszar's avatar
      RTCD: finalize removal of old RTCD system · 8aae2460
      John Koleszar authored
      This is the final commit in the series converting to the new RTCD
      system. It removes the encoder csystemdependent files and the remaining
      global function pointers that didn't conform to the old RTCD system.
      
      Change-Id: I9649706f1bb89f0cbf431ab0e3e7552d37be4d8e
      8aae2460
    • John Koleszar's avatar
      RTCD: add block subtraction functions · be8af188
      John Koleszar authored
      This commit continues the process of converting to the new RTCD
      system.
      
      Change-Id: Id8a287fdd4bd050ea4452e1582ad85520f3081be
      be8af188
    • John Koleszar's avatar
      RTCD: add quantizer functions · 61311e61
      John Koleszar authored
      This commit continues the process of converting to the new RTCD
      system.
      
      Change-Id: Iba9df4c03a508e51c37201c621be43523fae87d9
      61311e61
    • John Koleszar's avatar
      RTCD: add FDCT functions · 510e0ab4
      John Koleszar authored
      This commit continues the process of converting to the new RTCD
      system.
      
      Change-Id: I3f9c07db65eb206f6363d21bdb80e871570da767
      510e0ab4
    • John Koleszar's avatar
      RTCD: add variance functions · 83a91e78
      John Koleszar authored
      This commit continues the process of converting to the new RTCD
      system.
      
      Change-Id: Ie5c1aa480637e98dc3918fb562ff45c37a66c538
      83a91e78
  5. 20 Jan, 2012 1 commit
    • Fritz Koenig's avatar
      Disconnect ARM tgt_isa from dsp extensions · 89210284
      Fritz Koenig authored
      A processor with ARMv7 instructions does not
      necessarily have NEON dsp extensions.  This CL
      has the added side effect of allowing the ability
      to enable/disable the dsp extensions cleanly.
      
      Change-Id: Ie1e879b8fe131885bc3d4138a0acc9ffe73a36df
      89210284
  6. 20 Sep, 2011 2 commits
  7. 19 Sep, 2011 1 commit
    • Tero Rintaluoma's avatar
      Updated ARMv6 forward transforms to match C · 4c3ad66b
      Tero Rintaluoma authored
      - Updated walsh transform to match C
        (based on Change Id24f3392)
      - Changed fast_fdct4x4 and 8x4 to short_fdct4x4 and 8x4
        correspondingly
      
      Change-Id: I704e862f40e315b0a79997633c7bd9c347166a8e
      4c3ad66b
  8. 01 Aug, 2011 1 commit
  9. 21 Jun, 2011 1 commit
  10. 01 Jun, 2011 1 commit
    • Tero Rintaluoma's avatar
      neon fast quantize block pair · 61f0c090
      Tero Rintaluoma authored
      vp8_fast_quantize_b_pair_neon function added to quantize
      two adjacent blocks at the same time to improve performance.
       - Additional 3-6% speedup compared to neon optimized fast
         quantizer (Tanya VGA@30fps, 1Mbps stream, cpu-used=-5..-16)
      
      Change-Id: I3fcbf141e5d05e9118c38ca37310458afbabaa4e
      61f0c090
  11. 06 May, 2011 1 commit
    • Tero Rintaluoma's avatar
      neon fast quantizer updated · 33fa7c4e
      Tero Rintaluoma authored
      vp8_fast_quantize_b_neon function updated and further optimized.
       - match current C implementation of fast quantizer
       - updated to use asm_enc_offsets for structure members
       - updated ads2gas scripts to handle alignment issues
      
      Change-Id: I5cbad9c460ad8ddb35d2970a8684cc620711c56d
      33fa7c4e
  12. 01 Apr, 2011 1 commit
    • Tero Rintaluoma's avatar
      Wrapper function removed from vp8_subtract_b_neon function call · cec76a36
      Tero Rintaluoma authored
      Address calculations moved from encodemb_arm.c file to neon
      optimized assembly function to save cycles in function calls.
       - vp8_subtract_b_neon_func replaced with vp8_subtract_b_neon
         that contains all needed address calculations
       - unnecessary file encodemb_arm.c removed
       - consistent with ARMv6 optimized version
      
      Change-Id: I6cbc1a2670b56c2077f59995fcf8f70786b4990b
      cec76a36
  13. 29 Mar, 2011 1 commit
    • Tero Rintaluoma's avatar
      ARMv6 optimized subtract functions · 6fdc9aa7
      Tero Rintaluoma authored
      Adds following ARMv6 optimized functions to encoder:
        - vp8_subtract_b_armv6
        - vp8_subtract_mby_armv6
        - vp8_subtract_mbuv_armv6
      
      Gives 1-5% speed-up depending on input sequence and encoding
      parameters. Functions have one stall cycle inside the loop body
      on Cortex pipeline.
      
      Change-Id: I19cca5408b9861b96f378e818eefeb3855238639
      6fdc9aa7
  14. 28 Mar, 2011 2 commits
    • Johann's avatar
      add asm_enc_offsets.c for all targets · 4be062bb
      Johann authored
      now that we need asm_enc_offsets.c for x86 and arm and it is
      harmless to build it for other targets, add it unconditionally
      
      Change-Id: I320c5220afd94fee2b98bda9ff4e5e34c67062f3
      4be062bb
    • Tero Rintaluoma's avatar
      Half pixel variance further optimized for ARMv6 · f5e43346
      Tero Rintaluoma authored
      Half pixel interpolations optimized in variance calculations. Separate
      function calls to vp8_filter_block2d_bil_x_pass_armv6 are avoided.On
      average, performance improvement is 6-7% for VGA@30fps sequences.
      
      Change-Id: Idb5f118a9d51548e824719d2cfe5be0fa6996628
      f5e43346
  15. 21 Mar, 2011 1 commit
    • Tero Rintaluoma's avatar
      ARMv6 optimized fdct4x4 · a61785b6
      Tero Rintaluoma authored
      Optimized fdct4x4 (8x4) for ARMv6 instruction set.
        - No interlocks in Cortex-A8 pipeline
        - One interlock cycle in ARM11 pipeline
        - About 2.16 times faster than current C-code compiled with -O3
      
      Change-Id: I60484ecd144365da45bb68a960d30196b59952b8
      a61785b6
  16. 15 Mar, 2011 1 commit
  17. 14 Mar, 2011 1 commit
  18. 11 Mar, 2011 1 commit
    • Tero Rintaluoma's avatar
      ARMv6 optimized quantization · 7ab08e1f
      Tero Rintaluoma authored
      Adds new ARMv6 optimized function vp8_fast_quantize_b_armv6
      to the encoder.
      
      Change-Id: I40277ec8f82e8a6cbc453cf295a0cc9b2504b21e
      7ab08e1f
  19. 11 Feb, 2011 1 commit
    • Tero Rintaluoma's avatar
      ARMv6 optimized sad16x16 · 1ef86980
      Tero Rintaluoma authored
      Adds a new ARMv6 optimized function vp8_sad16x16_armv6 to encoder.
      
      Change-Id: Ibbd7edb8b25cb7a5b522d391b1e9a690fe150e57
      1ef86980
  20. 09 Feb, 2011 1 commit
    • Tero Rintaluoma's avatar
      Adds armv6 optimized variance calculation · cb14764f
      Tero Rintaluoma authored
      Adds vp8_sub_pixel_variance16x16_armv6 function to encoder. Integrates
      ARMv6 optimized bilinear interpolations from vp8/common/arm/armv6
      and adds new assembly file for variance16x16 calculation.
       - vp8_filter_block2d_bil_first_pass_armv6   (integrated)
       - vp8_filter_block2d_bil_second_pass_armv6  (integrated)
       - vp8_variance16x16_armv6 (new)
       - bilinearfilter_arm.h (new)
      Change-Id: I18a8331ce7d031ceedd6cd415ecacb0c8f3392db
      cb14764f
  21. 08 Feb, 2011 1 commit
    • Johann's avatar
      clarify *_offsets.asm differences · 40dcae9c
      Johann authored
      it's difficult to mux the *_offsets.c files because of header conflicts.
      make three instead, name them consistently and partititon the contents
      to allow building them as required.
      
      Change-Id: I8f9768c09279f934f44b6c5b0ec363f7943bb796
      40dcae9c
  22. 26 Jan, 2011 1 commit
  23. 25 Jan, 2011 1 commit
    • Johann's avatar
      move new neon subpixel function · 2168a944
      Johann authored
      previously wasn't guarded with ifdef ARMV7, causing a link error with
      ARMV6
      
      Change-Id: I0526858be0b5f49b2bf11e9090180b2a6c48926d
      2168a944
  24. 27 Oct, 2010 1 commit
    • John Koleszar's avatar
      Add half-pixel variance RTCD functions · 209d82ad
      John Koleszar authored
      NEON has optimized 16x16 half-pixel variance functions, but they
      were not part of the RTCD framework. Add these functions to RTCD,
      so that other platforms can make use of this optimization in the
      future and special-case ARM code can be removed.
      
      A number of functions were taking two variance functions as
      parameters. These functions were changed to take a single
      parameter, a pointer to a struct containing all the variance
      functions for that block size. This provides additional flexibility
      for calling additional variance functions (the half-pixel special
      case, for example) and by initializing the table for all block sizes,
      we don't have to construct this function pointer table for each
      macroblock.
      
      Change-Id: I78289ff36b2715f9a7aa04d5f6fbe3d23acdc29c
      209d82ad
  25. 25 Oct, 2010 1 commit
    • Timothy B. Terriberry's avatar
      Add runtime CPU detection support for ARM. · b71962fd
      Timothy B. Terriberry authored
      The primary goal is to allow a binary to be built which supports
       NEON, but can fall back to non-NEON routines, since some Android
       devices do not have NEON, even if they are otherwise ARMv7 (e.g.,
       Tegra).
      The configure-generated flags HAVE_ARMV7, etc., are used to decide
       which versions of each function to build, and when
       CONFIG_RUNTIME_CPU_DETECT is enabled, the correct version is chosen
       at run time.
      In order for this to work, the CFLAGS must be set to something
       appropriate (e.g., without -mfpu=neon for ARMv7, and with
       appropriate -march and -mcpu for even earlier configurations), or
       the native C code will not be able to run.
      The ASFLAGS must remain set for the most advanced instruction set
       required at build time, since the ARM assembler will refuse to emit
       them otherwise.
      I have not attempted to make any changes to configure to do this
       automatically.
      Doing so will probably require the addition of new configure options.
      
      Many of the hooks for RTCD on ARM were already there, but a lot of
       the code had bit-rotted, and a good deal of the ARM-specific code
       is not integrated into the RTCD structs at all.
      I did not try to resolve the latter, merely to add the minimal amount
       of protection around them to allow RTCD to work.
      Those functions that were called based on an ifdef at the calling
       site were expanded to check the RTCD flags at that site, but they
       should be added to an RTCD struct somewhere in the future.
      The functions invoked with global function pointers still are, but
       these should be moved into an RTCD struct for thread safety (I
       believe every platform currently supported has atomic pointer
       stores, but this is not guaranteed).
      
      The encoder's boolhuff functions did not even have _c and armv7
       suffixes, and the correct version was resolved at link time.
      The token packing functions did have appropriate suffixes, but the
       version was selected with a define, with no associated RTCD struct.
      However, for both of these, the only armv7 instruction they actually
       used was rbit, and this was completely superfluous, so I reworked
       them to avoid it.
      The only non-ARMv4 instruction remaining in them is clz, which is
       ARMv5 (not even ARMv5TE is required).
      Considering that there are no ARM-specific configs which are not at
       least ARMv5TE, I did not try to detect these at runtime, and simply
       enable them for ARMv5 and above.
      
      Finally, the NEON register saving code was completely non-reentrant,
       since it saved the registers to a global, static variable.
      I moved the storage for this onto the stack.
      A single binary built with this code was tested on an ARM11 (ARMv6)
       and a Cortex A8 (ARMv7 w/NEON), for both the encoder and decoder,
       and produced identical output, while using the correct accelerated
       functions on each.
      I did not test on any earlier processors.
      
      Change-Id: I45cbd63a614f4554c3b325c45d46c0806f009eaa
      b71962fd
  26. 09 Sep, 2010 1 commit
  27. 18 Jun, 2010 1 commit
    • John Koleszar's avatar
      cosmetics: trim trailing whitespace · 94c52e4d
      John Koleszar authored
      When the license headers were updated, they accidentally contained
      trailing whitespace, so unfortunately we have to touch all the files
      again.
      
      Change-Id: I236c05fade06589e417179c0444cb39b09e4200d
      94c52e4d
  28. 04 Jun, 2010 1 commit
  29. 18 May, 2010 1 commit