• Jean-Marc Valin's avatar
    Fixes packet parsing for 16-bit CPUs · 4a643d98
    Jean-Marc Valin authored
    Without that change, a very long (> 682 ms) illegal packet could trigger
    a wrap-around in the test and be accepted as valid.
    
    Only 16-bit architectures (e.g. TI C5x) were affected.
    4a643d98