From 408847dcdfe1d407cd85616e8f595fb5ea25ca46 Mon Sep 17 00:00:00 2001
From: YunQiang Su <wzssyqa@gmail.com>
Date: Sat, 31 Aug 2013 19:54:32 +0800
Subject: [PATCH] Fix JavaScriptCore ftbfs on mips64(el)
Task-number: QTBUG-33187
Change-Id: Iaebca6f5095e16c0316549c8a548cfc0a447faf3
Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
---
.../JavaScriptCore/wtf/Platform.h | 22 ++++++++++++++++++-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/src/3rdparty/javascriptcore/JavaScriptCore/wtf/Platform.h b/src/3rdparty/javascriptcore/JavaScriptCore/wtf/Platform.h
index d4838063..94de5ec9 100644
--- a/src/3rdparty/javascriptcore/JavaScriptCore/wtf/Platform.h
+++ b/src/3rdparty/javascriptcore/JavaScriptCore/wtf/Platform.h
@@ -325,7 +325,27 @@
#endif /* ARM */
+#if (defined(mips) || defined(__mips__) || defined(MIPS) || defined(_MIPS_))
+#define WTF_CPU_MIPS 1
+#include <sgidefs.h>
+#if defined(__MIPSEB__)
+#define WTF_CPU_BIG_ENDIAN 1
+#endif
+/* CPU(MIPS64) - MIPS 64-bit both BIG and LITTLE endian */
+#if defined(_MIPS_SIM_ABI64) && (_MIPS_SIM == _MIPS_SIM_ABI64)
+#define WTF_CPU_MIPS64 1
+#endif
+/* CPU(MIPSN32) - MIPS N32 ABI both BIG and LITTLE endian */
+#if defined(_MIPS_SIM_ABIN32) && (_MIPS_SIM == _MIPS_SIM_ABIN32)
+#define WTF_CPU_MIPSN32 1
+#endif
+
+/* CPU(MIPS32) - MIPS O32 ABI both BIG and LITTLE endian */
+#if defined(_MIPS_SIM_ABI32) && (_MIPS_SIM == _MIPS_SIM_ABI32)
+#define WTF_CPU_MIPS32 1
+#endif
+#endif /* __mips__ */
/* ==== OS() - underlying operating system; only to be used for mandated low-level services like
virtual memory, not to choose a GUI toolkit ==== */
@@ -876,7 +896,7 @@
#endif
#if !defined(WTF_USE_JSVALUE64) && !defined(WTF_USE_JSVALUE32) && !defined(WTF_USE_JSVALUE32_64)
-#if (CPU(X86_64) && (OS(UNIX) || OS(WINDOWS) || OS(SOLARIS) || OS(HPUX))) || (CPU(IA64) && !CPU(IA64_32)) || CPU(ALPHA) || CPU(AIX64) || CPU(SPARC64)
+#if (CPU(X86_64) && (OS(UNIX) || OS(WINDOWS) || OS(SOLARIS) || OS(HPUX))) || (CPU(IA64) && !CPU(IA64_32)) || CPU(ALPHA) || CPU(AIX64) || CPU(SPARC64) || CPU(MIPS64)
#define WTF_USE_JSVALUE64 1
#elif CPU(ARM) || CPU(PPC64)
#define WTF_USE_JSVALUE32 1
--
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