- 24 Mar, 2014 - 11 commits
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Jim Bankoski authored
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Jim Bankoski authored
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Marco Paniconi authored
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Minghai Shang authored
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Yunqing Wang authored
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Marco Paniconi authored
Change-Id: I398decf319c8f4d1b3abe1f276e009840e61b684
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Dmitry Kovalev authored
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Jim Bankoski authored
Change-Id: I7872b726511887494107466a946e2b34e3d74045
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Dmitry Kovalev authored
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Jim Bankoski authored
Change-Id: Id70bd0ff8836c28d9c8653e018e071ca9fb06610
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Jim Bankoski authored
Change-Id: I0e7d2815839d8a64250116a5486570d03659a4c0
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- 23 Mar, 2014 - 2 commits
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Dmitry Kovalev authored
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Dmitry Kovalev authored
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- 22 Mar, 2014 - 6 commits
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Jingning Han authored
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Dmitry Kovalev authored
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Dmitry Kovalev authored
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Dmitry Kovalev authored
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Minghai Shang authored
Change-Id: I67ea45119f23659279d24aa67eb823c751ac86fc
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Marco Paniconi authored
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- 21 Mar, 2014 - 21 commits
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Jingning Han authored
This commit reformats non-RD coding flow layout to allow mode decision with fixed and variable block sizes. Change-Id: I2cdd3bb9f26c499ee4a9849004fd925cdd195d09
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Dmitry Kovalev authored
Change-Id: I7c7cf7d3c7b00d1c74ffa8aa8fb8d78a0e48326f
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Dmitry Kovalev authored
Change-Id: I5e0c558b86cf300722ab34fa45ab4ad7c81bd4df
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Frank Galligan authored
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Marco Paniconi authored
Change-Id: Id76a628495c822e23825b66a7589b4a3279680e2
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Alex Converse authored
Change-Id: I06e17b489dea74dedea356c73ef72dc5ffad3a30
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Dmitry Kovalev authored
Change-Id: I83a201ab4dcf2f00131f2030f382c6dbfcb39d7e
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Dmitry Kovalev authored
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Dmitry Kovalev authored
Change-Id: Ibb72a29cae9ca9443aae56fc4c5458d190eae279
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Dmitry Kovalev authored
Change-Id: I7c94b02f621ccc1a738b0d52edf60e9012cfc014
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levytamar82 authored
2 functions were optimized for avx2 by using full 256 bit register In order to handle 32 elements in parallel instead of only 16 in parallel: 1. vp9_sad32x32x4d 2. vp9_sad64x64x4d The function level gain is 66% and the user level gain is ~1%. Change-Id: I4efbb3bc7d8bc03b64b6c98f5cd5c4a9dd3212cb
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Yunqing Wang authored
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Dmitry Kovalev authored
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Yunqing Wang authored
Fixed dr memory errors reported in Issue 736: https://code.google.com/p/webm/issues/detail?id=736 All elements in left_col buffer need to be initialized to ensure the correctness of SIMD operations in x86 optimized code. Change-Id: I8e7f26ab45cca8099c1f9342bcf852f828bda7e4
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Yaowu Xu authored
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Dmitry Kovalev authored
Change-Id: Ib3c1746e61220c629cbd971b2458aa686b5c9e36
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Dmitry Kovalev authored
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Dmitry Kovalev authored
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Dmitry Kovalev authored
Change-Id: I1804c3629c3df2b67438e87196ab35fafaddaa24
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Yaowu Xu authored
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Yaowu Xu authored
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