- 05 Aug, 2013 - 6 commits
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Dmitry Kovalev authored
Change-Id: I3aae21e88b876d53ecc955260479980ffe04ad8d
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Jim Bankoski authored
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Jim Bankoski authored
Cons bw/bh parms that should have been const. Additional formatting. Change-Id: Icd36a5c9dc17dadd7284315ac0d6fef1a565ca16
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Paweł Hajdan authored
- new date - add VP9 to the title - update list of available targets Change-Id: I56263336db393020bac5da8e42fbac3a276ffb1f
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Dmitry Kovalev authored
Change-Id: I428c4d42212b757112e3acfe5b81314cfbb5fd6b
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Dmitry Kovalev authored
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- 04 Aug, 2013 - 2 commits
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Dmitry Kovalev authored
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Jim Bankoski authored
This is an attempt at rewriting vp9_find_mv_refs_idx. I believe that it gains about 1-2% decode speed Change-Id: Ia5359c94ce9bb43b32652890e605e9a385485c1b
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- 03 Aug, 2013 - 1 commit
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Dmitry Kovalev authored
Consistent names with TX_SIZE, TX_MODE, and TX_MODE. Change-Id: I79592218bf5a40ace89197a34a06ee7de581ed8d
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- 02 Aug, 2013 - 25 commits
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Dmitry Kovalev authored
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Dmitry Kovalev authored
Change-Id: I94f6b4272b95ac101de6d10f048116ba065788b0
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Dmitry Kovalev authored
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Dmitry Kovalev authored
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Dmitry Kovalev authored
Using it instead of long unclear verbose check "mbmi->ref_frame[0] != INTRA_FRAME". Change-Id: I9c7b4b3797942fa962bf3ba7460fff3084beabe9
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Dmitry Kovalev authored
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Yunqing Wang authored
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Dmitry Kovalev authored
Change-Id: I8f21c18b29f54b277fb1c167f278f109d9f3b996
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Dmitry Kovalev authored
Change-Id: Ic878d31df2ce783a2c9a8c4bc9ed301ec8ffe25e
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Dmitry Kovalev authored
Change-Id: I3fe90eb40088a5b07bdc7d66d93ffe6ef99943d5
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Adrian Grange authored
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Adrian Grange authored
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Johann authored
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Johann authored
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Johann authored
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Johann authored
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Dmitry Kovalev authored
Change-Id: Ic07f5f8ffeaedd5b7513b464871f83afc82dcd5c
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Dmitry Kovalev authored
Change-Id: I0e9329490828684a4fd46f540d89114cc68e8407
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Yunqing Wang authored
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Mans Rullgard authored
Change-Id: I5d6906772e6e6adf68d7f0fd5b8b5207a64a3a37
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Mans Rullgard authored
Change-Id: Ic7cacd02d6dc9243ad8fc85082c5618a9d1e66dc
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Mans Rullgard authored
Loading to single lanes in multiple registers is expensive since it requires a read and write of each register which saturates the register file access. Loading to single registers followed by a separate transpose reduces this pressure. Change-Id: I4cc35887ddbca80e5e635b50d2b1d158de9668ee
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Mans Rullgard authored
Change-Id: I13e0880df234f15abc4cc7c57fe84488d5d46a75
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Dmitry Kovalev authored
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Dmitry Kovalev authored
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- 01 Aug, 2013 - 6 commits
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Jingning Han authored
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Dmitry Kovalev authored
Change-Id: I73b59d7699a8e7e7acd3bf8041cb6c98ce9ba4bf
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Dmitry Kovalev authored
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Dmitry Kovalev authored
Change-Id: I8715f08a3554bdb557c5f935f1dfbd671f18e766
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Dmitry Kovalev authored
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Deb Mukherjee authored
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