Change-Id: I0f2d5155ec042e9b5cbe9a9d6b186b121ed7737f

Fixes issue #705.

Change-Id: I60d45ee28fb34f401a440015bfe7bd3837b51de1

Run sub-pixel motion search when NEWMV gives lower rate-distortion
cost. This improves coding performance of derf set by 8%, std-hd by
2.2%.

Change-Id: Ife50f7fda8463927784fe59a41cc439c833e941a

Change-Id: Ia5b35494e4e18758f9f6c172526db83a87fdaa26

Change-Id: I02cc50648b62768e20d2f465b5ad09648b1abe93

avoids mismatched alignment warnings in visual studio builds

Change-Id: I2cedb8042fd47e708bde3f7168a6fb4bd9aaa569

Change-Id: I747982e7d1157a8b45f4034ddf207306f9f957e0

- Rename and make static
  s/vp9_compute_qdelta_by_rate/compute_qdelta_by_rate/
- Make base_q_index an integer.
- Add a cast.

Change-Id: Iea8d1397fd2717e7373b182ec51f5db960ef2cca

Change-Id: Ifabb8c7ec0c327fea9d6739cab10addb060ff435
Signed-off-by: James Yu <james.yu@linaro.org>

Change-Id: Ica1b583d69810182f621de757d2543b2a3b35566

these were incorrectly stripped in:
50fa5859 Removing examples code generation and making them static.

Change-Id: Idb475ad5b303634311e9f616604312cb925cc6a9

Change-Id: If2e8e06c74d065323523904ff1771590fd48cabc

Change-Id: I29e4d3a3c8cceb18825371bb78c83c0e7dd86e0f

Optimizing 2 functions to process 32 elements in parallel instead of 16:
1. vp9_sub_pixel_variance64x64
2. vp9_sub_pixel_variance32x32
both of those function were calling vp9_sub_pixel_variance16xh_ssse3
instead of calling that function, it calls vp9_sub_pixel_variance32xh_avx2
that is written in avx2 and process 32 elements in parallel.
This Optimization gave 70% function level gain and 2% user level gain

Change-Id: I4f5cb386b346ff6c878a094e1c3b37e418e50bde

Change-Id: I568861ba1d43620865ad9a98a97eef37a51fd856

Minor fix to ensure that positive and negative cpu_used
values produce the same output.

Change-Id: I9157d05cb9a7c0bd57a4d8a9f268205a825b9b0b

This was inadvertently left out in a previous refactoring step.

Change-Id: Idf3350e95152f876a1a1a4591dd30c8981856c96

Optimizing all SSSE3 assembly for convolution:
1. vp9_filter_block1d4_h8_sse2
2. vp9_filter_block1d8_h8_sse2
3. vp9_filter_block1d16_h8_sse2
4. vp9_filter_block1d4_v8_sse2
5. vp9_filter_block1d8_v8_sse2
6. vp9_filter_block1d16_v8_sse2
my optimization include:
-processing 2x8 elements in one 128 bit register instead of processing
8 elements in one 128 bit register.
-removing unecessary loads.
This optimization gives between 2.4% user level gain for 480p input
and 1.6% user level gain for 720p.
This Optimization is done only for 64 bit

Change-Id: Ic07fce2f9360329b4f2d956efda1480ae958766b